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From: Beniamino Galvani <b.galvani@gmail.com>
To: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, Carlo Caione <carlo@caione.org>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	Jerry Cao <jerry.cao@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>
Subject: Re: [PATCH 2/3] spi: meson: Add support for Amlogic Meson SPIFC
Date: Tue, 11 Nov 2014 20:52:34 +0100	[thread overview]
Message-ID: <20141111195234.GA15145@gmail.com> (raw)
In-Reply-To: <20141110151140.GA3815@sirena.org.uk>

On Mon, Nov 10, 2014 at 03:11:40PM +0000, Mark Brown wrote:
> On Sun, Nov 09, 2014 at 11:56:50PM +0100, Beniamino Galvani wrote:
> > On Sun, Nov 09, 2014 at 10:17:12AM +0000, Mark Brown wrote:
>
> > > I noticed that the handling of /CS was done in the spifc_txrx() function
> > > - will this do the right thing if the transfer needs to be split for the
> > > buffer size?
> 
> > It should. When the transfer gets split, CS is kept active for all the
> > chunks and the value of CS after that depends on the value of
> > cs_change.
> 
> Can you be more specific about how that works?  I'm just not seeing the
> code that handles this.

It's this:

static int meson_spifc_txrx(struct meson_spifc *spifc,
                            struct spi_transfer *xfer,
                            int offset, int len, bool last_xfer,
                            bool last_chunk)
{
	bool keep_cs = true;

	[...]

        if (last_chunk) {
                if (last_xfer)
                        keep_cs = xfer->cs_change;
                else
                        keep_cs = !xfer->cs_change;
        }

        regmap_update_bits(spifc->regmap, REG_USER4, USER4_CS_ACT,
                           keep_cs ? USER4_CS_ACT : 0);

	/* start transfer */
	[...]
}

The USER4_CS_ACT bit specifies if CS must be kept active after the
transfer.

> > > > +	if (!ret && xfer->delay_usecs)
> > > > +		udelay(xfer->delay_usecs);
> 
> > > The core will do this for you if you implement this as transfer_one().
> 
> > Please correct me if I'm wrong, but I think that transfer_one() can't
> > be used in this case. The hardware doesn't support direct manipulation
> > of CS and allows only to specify if CS must be kept active after the
> > current transfer. So I need to know for each transfer if it's the last
> > and this can be achieved only implementing transfer_one_message().
> 
> This is already in a function that's operating at the transfer_one()
> level, the function is even called transfer_one() and besides it's
> clearly not something specific to this hardware so should be factored
> out into the core instead of open coded.

A way to simplify this at core level could be to add a 'last' flag to
the spi_transfer structure and populate it before calling
transfer_one_message(); in this way, drivers that need to know the
position of the transfer in the message in order to properly handle CS
can use the generic version of transfer_one_message() instead of
reimplementing it. It seems that other existing drivers probably can
benefit from this.

Beniamino

WARNING: multiple messages have this Message-ID (diff)
From: b.galvani@gmail.com (Beniamino Galvani)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] spi: meson: Add support for Amlogic Meson SPIFC
Date: Tue, 11 Nov 2014 20:52:34 +0100	[thread overview]
Message-ID: <20141111195234.GA15145@gmail.com> (raw)
In-Reply-To: <20141110151140.GA3815@sirena.org.uk>

On Mon, Nov 10, 2014 at 03:11:40PM +0000, Mark Brown wrote:
> On Sun, Nov 09, 2014 at 11:56:50PM +0100, Beniamino Galvani wrote:
> > On Sun, Nov 09, 2014 at 10:17:12AM +0000, Mark Brown wrote:
>
> > > I noticed that the handling of /CS was done in the spifc_txrx() function
> > > - will this do the right thing if the transfer needs to be split for the
> > > buffer size?
> 
> > It should. When the transfer gets split, CS is kept active for all the
> > chunks and the value of CS after that depends on the value of
> > cs_change.
> 
> Can you be more specific about how that works?  I'm just not seeing the
> code that handles this.

It's this:

static int meson_spifc_txrx(struct meson_spifc *spifc,
                            struct spi_transfer *xfer,
                            int offset, int len, bool last_xfer,
                            bool last_chunk)
{
	bool keep_cs = true;

	[...]

        if (last_chunk) {
                if (last_xfer)
                        keep_cs = xfer->cs_change;
                else
                        keep_cs = !xfer->cs_change;
        }

        regmap_update_bits(spifc->regmap, REG_USER4, USER4_CS_ACT,
                           keep_cs ? USER4_CS_ACT : 0);

	/* start transfer */
	[...]
}

The USER4_CS_ACT bit specifies if CS must be kept active after the
transfer.

> > > > +	if (!ret && xfer->delay_usecs)
> > > > +		udelay(xfer->delay_usecs);
> 
> > > The core will do this for you if you implement this as transfer_one().
> 
> > Please correct me if I'm wrong, but I think that transfer_one() can't
> > be used in this case. The hardware doesn't support direct manipulation
> > of CS and allows only to specify if CS must be kept active after the
> > current transfer. So I need to know for each transfer if it's the last
> > and this can be achieved only implementing transfer_one_message().
> 
> This is already in a function that's operating at the transfer_one()
> level, the function is even called transfer_one() and besides it's
> clearly not something specific to this hardware so should be factored
> out into the core instead of open coded.

A way to simplify this at core level could be to add a 'last' flag to
the spi_transfer structure and populate it before calling
transfer_one_message(); in this way, drivers that need to know the
position of the transfer in the message in order to properly handle CS
can use the generic version of transfer_one_message() instead of
reimplementing it. It seems that other existing drivers probably can
benefit from this.

Beniamino

  reply	other threads:[~2014-11-11 19:52 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-09  9:25 [PATCH 0/3] spi: Add support for Amlogic Meson SPIFC Beniamino Galvani
2014-11-09  9:25 ` Beniamino Galvani
2014-11-09  9:25 ` [PATCH 1/3] spi: meson: Add device tree bindings documentation for SPIFC Beniamino Galvani
2014-11-09  9:25   ` Beniamino Galvani
2014-11-09  9:25   ` Beniamino Galvani
2014-11-09  9:25 ` [PATCH 2/3] spi: meson: Add support for Amlogic Meson SPIFC Beniamino Galvani
2014-11-09  9:25   ` Beniamino Galvani
     [not found]   ` <1415525113-25598-3-git-send-email-b.galvani-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-11-09 10:17     ` Mark Brown
2014-11-09 10:17       ` Mark Brown
2014-11-09 10:17       ` Mark Brown
     [not found]       ` <20141109101712.GM2722-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2014-11-09 22:56         ` Beniamino Galvani
2014-11-09 22:56           ` Beniamino Galvani
2014-11-09 22:56           ` Beniamino Galvani
     [not found]           ` <20141109225650.GA27950-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-11-10 15:11             ` Mark Brown
2014-11-10 15:11               ` Mark Brown
2014-11-10 15:11               ` Mark Brown
2014-11-11 19:52               ` Beniamino Galvani [this message]
2014-11-11 19:52                 ` Beniamino Galvani
2014-11-09  9:25 ` [PATCH 3/3] ARM: dts: meson: add node for SPIFC Beniamino Galvani
2014-11-09  9:25   ` Beniamino Galvani
2014-11-09 10:17   ` Mark Brown
2014-11-09 10:17     ` Mark Brown

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