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From: Lina Iyer <lina.iyer@linaro.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
	"khilman@linaro.org" <khilman@linaro.org>,
	"sboyd@codeaurora.org" <sboyd@codeaurora.org>,
	"galak@codeaurora.org" <galak@codeaurora.org>,
	"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"msivasub@codeaurora.org" <msivasub@codeaurora.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v9 6/9] qcom: cpuidle: Add cpuidle driver for QCOM cpus
Date: Mon, 17 Nov 2014 15:15:42 -0700	[thread overview]
Message-ID: <20141117221542.GH45276@linaro.org> (raw)
In-Reply-To: <20141117173950.GA24304@e102568-lin.cambridge.arm.com>

On Mon, Nov 17 2014 at 10:39 -0700, Lorenzo Pieralisi wrote:
>On Sat, Oct 25, 2014 at 12:40:21AM +0100, Lina Iyer wrote:
>> Add cpuidle driver interface to allow cpus to go into C-States. Use the
>> cpuidle DT interface, common across ARM architectures, to provide the
>> C-State information to the cpuidle framework.
>
>"idle states", this is not ACPI.
>
Okay.
>> Supported modes at this time are Standby and Standalone Power Collapse.
>>
>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>> ---
[...]

> +static struct qcom_cpu_pm_ops *lpm_ops;
>> +
>> +static int qcom_cpu_stby(struct cpuidle_device *dev,
>> +				struct cpuidle_driver *drv, int index)
>> +{
>> +	lpm_ops->standby(NULL);
>> +
>> +	return index;
>> +}
>> +
>> +static int qcom_cpu_spc(struct cpuidle_device *dev,
>> +				struct cpuidle_driver *drv, int index)
>> +{
>> +	lpm_ops->spc(NULL);
>> +
>> +	return index;
>> +}
>> +
>
>I can't have a look at this and avoid thinking that this should look
>something like:
>
>static qcom_cpu_idle(...., int index)
>{
>	lpm_ops[index].enter_idle(...);
>	return index;
>}
>
>Before jumping to conclusions, see below.
>
>> +static struct cpuidle_driver qcom_cpuidle_driver = {
>> +	.name	= "qcom_cpuidle",
>> +};
>> +
>> +static const struct of_device_id qcom_idle_state_match[] = {
>> +	{ .compatible = "qcom,idle-state-stby", .data = qcom_cpu_stby},
>> +	{ .compatible = "qcom,idle-state-spc", .data = qcom_cpu_spc },
>> +	{ },
>> +};
>> +
>> +static int qcom_cpuidle_probe(struct platform_device *pdev)
>> +{
>> +	struct cpuidle_driver *drv = &qcom_cpuidle_driver;
>> +	int ret;
>> +
>> +	lpm_ops = pdev->dev.platform_data;
>> +
>> +	/* Probe for other states, including standby */
>> +	ret = dt_init_idle_driver(drv, qcom_idle_state_match, 0);
>
>This driver will be DT only. If an idle state is parsed correctly,
>it is initialized, otherwise it is skipped. Now, if we added glue
>code in arch arm (as arm64 does) that allows us to link an idle state
>index with the functions above (a DT idle state contains all information
>required to initialize its enter function, more so now that we are adding
>power domains to the picture), what would be the issue in defining a
>common API that just passes the index to the arch back-end ? No pointers
>to pass, no platform drivers required and still no arch/soc code in
>drivers/cpuidle.
>
>I am obviously talking about DT CPUidle drivers only.
>
>If the idle state is parsed correctly and the backend initializer (let's
>call it arm_cpu_init_idle(cpu)) is successful (which means that DT idle
>states contain valid information and the enter functions could be
>initialized from DT properly) I do not see what's the problem, give it
>some thought.
>

>Anyway, I will put together an RFC to start the discussion when patch is
>merged and patch the relevant code as an example, you can go ahead with
>current code, I am reviewing it.
>
OK. I understand your idea. Like it.

>Lorenzo
>

WARNING: multiple messages have this Message-ID (diff)
From: lina.iyer@linaro.org (Lina Iyer)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 6/9] qcom: cpuidle: Add cpuidle driver for QCOM cpus
Date: Mon, 17 Nov 2014 15:15:42 -0700	[thread overview]
Message-ID: <20141117221542.GH45276@linaro.org> (raw)
In-Reply-To: <20141117173950.GA24304@e102568-lin.cambridge.arm.com>

On Mon, Nov 17 2014 at 10:39 -0700, Lorenzo Pieralisi wrote:
>On Sat, Oct 25, 2014 at 12:40:21AM +0100, Lina Iyer wrote:
>> Add cpuidle driver interface to allow cpus to go into C-States. Use the
>> cpuidle DT interface, common across ARM architectures, to provide the
>> C-State information to the cpuidle framework.
>
>"idle states", this is not ACPI.
>
Okay.
>> Supported modes at this time are Standby and Standalone Power Collapse.
>>
>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>> ---
[...]

> +static struct qcom_cpu_pm_ops *lpm_ops;
>> +
>> +static int qcom_cpu_stby(struct cpuidle_device *dev,
>> +				struct cpuidle_driver *drv, int index)
>> +{
>> +	lpm_ops->standby(NULL);
>> +
>> +	return index;
>> +}
>> +
>> +static int qcom_cpu_spc(struct cpuidle_device *dev,
>> +				struct cpuidle_driver *drv, int index)
>> +{
>> +	lpm_ops->spc(NULL);
>> +
>> +	return index;
>> +}
>> +
>
>I can't have a look at this and avoid thinking that this should look
>something like:
>
>static qcom_cpu_idle(...., int index)
>{
>	lpm_ops[index].enter_idle(...);
>	return index;
>}
>
>Before jumping to conclusions, see below.
>
>> +static struct cpuidle_driver qcom_cpuidle_driver = {
>> +	.name	= "qcom_cpuidle",
>> +};
>> +
>> +static const struct of_device_id qcom_idle_state_match[] = {
>> +	{ .compatible = "qcom,idle-state-stby", .data = qcom_cpu_stby},
>> +	{ .compatible = "qcom,idle-state-spc", .data = qcom_cpu_spc },
>> +	{ },
>> +};
>> +
>> +static int qcom_cpuidle_probe(struct platform_device *pdev)
>> +{
>> +	struct cpuidle_driver *drv = &qcom_cpuidle_driver;
>> +	int ret;
>> +
>> +	lpm_ops = pdev->dev.platform_data;
>> +
>> +	/* Probe for other states, including standby */
>> +	ret = dt_init_idle_driver(drv, qcom_idle_state_match, 0);
>
>This driver will be DT only. If an idle state is parsed correctly,
>it is initialized, otherwise it is skipped. Now, if we added glue
>code in arch arm (as arm64 does) that allows us to link an idle state
>index with the functions above (a DT idle state contains all information
>required to initialize its enter function, more so now that we are adding
>power domains to the picture), what would be the issue in defining a
>common API that just passes the index to the arch back-end ? No pointers
>to pass, no platform drivers required and still no arch/soc code in
>drivers/cpuidle.
>
>I am obviously talking about DT CPUidle drivers only.
>
>If the idle state is parsed correctly and the backend initializer (let's
>call it arm_cpu_init_idle(cpu)) is successful (which means that DT idle
>states contain valid information and the enter functions could be
>initialized from DT properly) I do not see what's the problem, give it
>some thought.
>

>Anyway, I will put together an RFC to start the discussion when patch is
>merged and patch the relevant code as an example, you can go ahead with
>current code, I am reviewing it.
>
OK. I understand your idea. Like it.

>Lorenzo
>

  reply	other threads:[~2014-11-17 22:15 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-24 23:40 [PATCH v9 0/9] cpuidle driver for QCOM SoCs: 8064, 8074, 8084 Lina Iyer
2014-10-24 23:40 ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 1/9] qcom: scm: scm_set_warm_boot_addr() to set the warmboot address Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-11-14  8:30   ` Daniel Lezcano
2014-11-14  8:30     ` Daniel Lezcano
2014-11-14 16:33     ` Lina Iyer
2014-11-14 16:33       ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 2/9] qcom: spm: Add Subsystem Power Manager driver Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-11-14 15:56   ` Daniel Lezcano
2014-11-14 15:56     ` Daniel Lezcano
2014-11-19 17:43     ` Lina Iyer
2014-11-19 17:43       ` Lina Iyer
2014-11-26 11:19       ` Daniel Lezcano
2014-11-26 11:19         ` Daniel Lezcano
2014-11-26 15:20         ` Lina Iyer
2014-11-26 15:20           ` Lina Iyer
2014-11-26 15:22           ` Lina Iyer
2014-11-26 15:22             ` Lina Iyer
2014-11-14 22:46   ` Stephen Boyd
2014-11-14 22:46     ` Stephen Boyd
2014-11-18 16:56     ` Lina Iyer
2014-11-18 16:56       ` Lina Iyer
2014-11-18 20:28       ` Stephen Boyd
2014-11-18 20:28         ` Stephen Boyd
2014-11-17 21:32   ` Daniel Lezcano
2014-11-17 21:32     ` Daniel Lezcano
2014-11-18 18:00     ` Lina Iyer
2014-11-18 18:00       ` Lina Iyer
2014-11-18 19:39     ` Bjorn Andersson
2014-11-18 19:39       ` Bjorn Andersson
2014-11-26 18:04   ` Kevin Hilman
2014-11-26 18:04     ` Kevin Hilman
2014-11-26 21:25     ` Daniel Lezcano
2014-11-26 21:25       ` Daniel Lezcano
2014-10-24 23:40 ` [PATCH v9 3/9] arm: dts: qcom: Add power-controller device node for 8974 Krait CPUs Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 4/9] arm: dts: qcom: Add power-controller device node for 8084 " Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 5/9] arm: dts: qcom: Update power-controller device node for 8064 " Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 6/9] qcom: cpuidle: Add cpuidle driver for QCOM cpus Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-11-16 21:20   ` Daniel Lezcano
2014-11-16 21:20     ` Daniel Lezcano
2014-11-17 18:30     ` Lina Iyer
2014-11-17 18:30       ` Lina Iyer
2014-11-17 17:39   ` Lorenzo Pieralisi
2014-11-17 17:39     ` Lorenzo Pieralisi
2014-11-17 22:15     ` Lina Iyer [this message]
2014-11-17 22:15       ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 7/9] arm: dts: qcom: Add idle states device nodes for 8974 Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 8/9] arm: dts: qcom: Add idle states device nodes for 8084 Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-10-24 23:40 ` [PATCH v9 9/9] arm: dts: qcom: Add idle state device nodes for 8064 Lina Iyer
2014-10-24 23:40   ` Lina Iyer
2014-10-27  9:15 ` [PATCH v9 0/9] cpuidle driver for QCOM SoCs: 8064, 8074, 8084 Ivan T. Ivanov
2014-10-27  9:15   ` Ivan T. Ivanov
2014-10-27 14:45   ` Lina Iyer
2014-10-27 14:45     ` Lina Iyer
2014-11-13 20:25 ` Lina Iyer
2014-11-13 20:25   ` Lina Iyer

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