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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 09/11] arm: perf: parse cpu affinity from dt
Date: Tue, 18 Nov 2014 10:40:12 +0000	[thread overview]
Message-ID: <20141118104012.GF18842@arm.com> (raw)
In-Reply-To: <20141117150804.GC25416@leverpostej>

On Mon, Nov 17, 2014 at 03:08:04PM +0000, Mark Rutland wrote:
> On Mon, Nov 17, 2014 at 11:20:35AM +0000, Will Deacon wrote:
> > On Fri, Nov 07, 2014 at 04:25:34PM +0000, Mark Rutland wrote:
> > > diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
> > > index dfcaba5..f09c8a0 100644
> > > --- a/arch/arm/kernel/perf_event_cpu.c
> > > +++ b/arch/arm/kernel/perf_event_cpu.c
> > > @@ -85,20 +85,27 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
> > >  	struct platform_device *pmu_device = cpu_pmu->plat_device;
> > >  	struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
> > >  
> > > -	irqs = min(pmu_device->num_resources, num_possible_cpus());
> > > +	irqs = cpu_pmu->nr_irqs;
> > >  
> > > -	irq = platform_get_irq(pmu_device, 0);
> > > -	if (irq >= 0 && irq_is_percpu(irq)) {
> > > -		on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
> > > -		free_percpu_irq(irq, &hw_events->percpu_pmu);
> > > -	} else {
> > > -		for (i = 0; i < irqs; ++i) {
> > > -			if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
> > > -				continue;
> > > -			irq = platform_get_irq(pmu_device, i);
> > > -			if (irq >= 0)
> > > -				free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, i));
> > > +	for (i = 0; i < irqs; i++) {
> > > +		struct cpu_irq *map = &cpu_pmu->irq_map[i];
> > > +		irq = map->irq;
> > > +
> > > +		if (irq <= 0)
> > > +			continue;
> > > +
> > > +		if (irq_is_percpu(irq)) {
> > > +			on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
> > 
> > Hmm, ok, so we're assuming that all the PMUs will be wired with PPIs in this
> > case. I have a patch allowing per-cpu interrupts to be requested for a
> > cpumask, but I suppose that can wait until it's actually needed.
> 
> I wasn't too keen on assuming all CPUs, but I didn't have the facility
> to request a PPI on a subset of CPUs. If you can point me at your patch,
> I'd be happy to take a look.

The patch is here:

https://git.kernel.org/cgit/linux/kernel/git/will/linux.git/commit/?h=irq&id=774f7bc54577b6875d96e670ee34580077fc10be

But I think we can avoid it until we find a platform that needs it. I can't
see a DT/ABI issue with that, can you?

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 09/11] arm: perf: parse cpu affinity from dt
Date: Tue, 18 Nov 2014 10:40:12 +0000	[thread overview]
Message-ID: <20141118104012.GF18842@arm.com> (raw)
In-Reply-To: <20141117150804.GC25416@leverpostej>

On Mon, Nov 17, 2014 at 03:08:04PM +0000, Mark Rutland wrote:
> On Mon, Nov 17, 2014 at 11:20:35AM +0000, Will Deacon wrote:
> > On Fri, Nov 07, 2014 at 04:25:34PM +0000, Mark Rutland wrote:
> > > diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
> > > index dfcaba5..f09c8a0 100644
> > > --- a/arch/arm/kernel/perf_event_cpu.c
> > > +++ b/arch/arm/kernel/perf_event_cpu.c
> > > @@ -85,20 +85,27 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
> > >  	struct platform_device *pmu_device = cpu_pmu->plat_device;
> > >  	struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
> > >  
> > > -	irqs = min(pmu_device->num_resources, num_possible_cpus());
> > > +	irqs = cpu_pmu->nr_irqs;
> > >  
> > > -	irq = platform_get_irq(pmu_device, 0);
> > > -	if (irq >= 0 && irq_is_percpu(irq)) {
> > > -		on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
> > > -		free_percpu_irq(irq, &hw_events->percpu_pmu);
> > > -	} else {
> > > -		for (i = 0; i < irqs; ++i) {
> > > -			if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
> > > -				continue;
> > > -			irq = platform_get_irq(pmu_device, i);
> > > -			if (irq >= 0)
> > > -				free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, i));
> > > +	for (i = 0; i < irqs; i++) {
> > > +		struct cpu_irq *map = &cpu_pmu->irq_map[i];
> > > +		irq = map->irq;
> > > +
> > > +		if (irq <= 0)
> > > +			continue;
> > > +
> > > +		if (irq_is_percpu(irq)) {
> > > +			on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
> > 
> > Hmm, ok, so we're assuming that all the PMUs will be wired with PPIs in this
> > case. I have a patch allowing per-cpu interrupts to be requested for a
> > cpumask, but I suppose that can wait until it's actually needed.
> 
> I wasn't too keen on assuming all CPUs, but I didn't have the facility
> to request a PPI on a subset of CPUs. If you can point me at your patch,
> I'd be happy to take a look.

The patch is here:

https://git.kernel.org/cgit/linux/kernel/git/will/linux.git/commit/?h=irq&id=774f7bc54577b6875d96e670ee34580077fc10be

But I think we can avoid it until we find a platform that needs it. I can't
see a DT/ABI issue with that, can you?

Will

  reply	other threads:[~2014-11-18 10:40 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-07 16:25 [PATCH 00/11] arm: perf: add support for heterogeneous PMUs Mark Rutland
2014-11-07 16:25 ` Mark Rutland
2014-11-07 16:25 ` [PATCH 01/11] of: Add empty of_get_next_parent stub Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 02/11] perf: allow for PMU-specific event filtering Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 03/11] arm: perf: treat PMUs as CPU affine Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 04/11] arm: perf: filter unschedulable events Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 05/11] arm: perf: reject multi-pmu groups Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 06/11] arm: perf: probe number of counters on affine CPUs Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 07/11] arm: perf: document PMU affinity binding Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-17 11:14   ` Will Deacon
2014-11-17 11:14     ` Will Deacon
2014-11-17 14:32   ` Rob Herring
2014-11-17 14:32     ` Rob Herring
2014-11-17 15:01     ` Mark Rutland
2014-11-17 15:01       ` Mark Rutland
2014-11-07 16:25 ` [PATCH 08/11] arm: perf: add functions to parse affinity from dt Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-17 11:16   ` Will Deacon
2014-11-17 11:16     ` Will Deacon
2014-11-17 15:02     ` Mark Rutland
2014-11-17 15:02       ` Mark Rutland
2014-11-07 16:25 ` [PATCH 09/11] arm: perf: parse cpu " Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-17 11:20   ` Will Deacon
2014-11-17 11:20     ` Will Deacon
2014-11-17 15:08     ` Mark Rutland
2014-11-17 15:08       ` Mark Rutland
2014-11-18 10:40       ` Will Deacon [this message]
2014-11-18 10:40         ` Will Deacon
2014-11-07 16:25 ` [PATCH 10/11] arm: perf: remove singleton PMU restriction Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-07 16:25 ` [PATCH 11/11] arm: dts: vexpress: describe all PMUs in TC2 dts Mark Rutland
2014-11-07 16:25   ` Mark Rutland
2014-11-17 11:24 ` [PATCH 00/11] arm: perf: add support for heterogeneous PMUs Will Deacon
2014-11-17 11:24   ` Will Deacon

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