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From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv3 09/16] ARM: mvebu: implement suspend/resume support for Armada XP
Date: Fri, 21 Nov 2014 17:59:57 +0100	[thread overview]
Message-ID: <20141121175957.6ef4f26d@free-electrons.com> (raw)
In-Reply-To: <20141121164142.GB20238@lunn.ch>

Dear Andrew Lunn,

On Fri, 21 Nov 2014 17:41:42 +0100, Andrew Lunn wrote:
> > +static void mvebu_pm_store_bootinfo(void)
> > +{
> > +	u32 *store_addr;
> > +	phys_addr_t resume_pc;
> > +
> > +	store_addr = phys_to_virt(BOOT_INFO_ADDR);
> > +	resume_pc = virt_to_phys(armada_370_xp_cpu_resume);
> > +
> > +	/*
> > +	 * The bootloader expects the first two words to be a magic
> > +	 * value (BOOT_MAGIC_WORD), followed by the address of the
> > +	 * resume code to jump to. Then, it expects a sequence of
> > +	 * (address, value) pairs, which can be used to restore the
> > +	 * value of certain registers. This sequence must end with the
> > +	 * BOOT_MAGIC_LIST_END magic value.
> > +	 */
> 
> Hi Thomas
> 
> Is this a well defined mechanism supported by mainline uboot, barebox
> etc. Or is it some Marvell extension to their uboot?

As far as I know, it is a Marvell extension to their "binary header",
so it's done even before U-Boot starts. Since the hardware needs
assistance from the bootloader to do suspend/resume, there is
necessarily a certain amount of cooperation/agreement needed by what
the kernel does and what the bootloader expects. I'm not sure there's
any "standard" mechanism here. Do you know of any?

I know the suspend/resume on the Blackfin architecture works the same
way (at least it used to work that way years ago when I did a bit of
Blackfin stuff). And here as well, there was some cooperation between
the kernel and the bootloader. See
arch/blackfin/mach-common/dpmc_modes.S, function do_hibernate() at the
end.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
Cc: Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	Sebastian Hesselbarth
	<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Gregory Clement
	<gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Tawfik Bayouk <tawfik-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Lior Amsalem <alior-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Ezequiel Garcia
	<ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCHv3 09/16] ARM: mvebu: implement suspend/resume support for Armada XP
Date: Fri, 21 Nov 2014 17:59:57 +0100	[thread overview]
Message-ID: <20141121175957.6ef4f26d@free-electrons.com> (raw)
In-Reply-To: <20141121164142.GB20238-g2DYL2Zd6BY@public.gmane.org>

Dear Andrew Lunn,

On Fri, 21 Nov 2014 17:41:42 +0100, Andrew Lunn wrote:
> > +static void mvebu_pm_store_bootinfo(void)
> > +{
> > +	u32 *store_addr;
> > +	phys_addr_t resume_pc;
> > +
> > +	store_addr = phys_to_virt(BOOT_INFO_ADDR);
> > +	resume_pc = virt_to_phys(armada_370_xp_cpu_resume);
> > +
> > +	/*
> > +	 * The bootloader expects the first two words to be a magic
> > +	 * value (BOOT_MAGIC_WORD), followed by the address of the
> > +	 * resume code to jump to. Then, it expects a sequence of
> > +	 * (address, value) pairs, which can be used to restore the
> > +	 * value of certain registers. This sequence must end with the
> > +	 * BOOT_MAGIC_LIST_END magic value.
> > +	 */
> 
> Hi Thomas
> 
> Is this a well defined mechanism supported by mainline uboot, barebox
> etc. Or is it some Marvell extension to their uboot?

As far as I know, it is a Marvell extension to their "binary header",
so it's done even before U-Boot starts. Since the hardware needs
assistance from the bootloader to do suspend/resume, there is
necessarily a certain amount of cooperation/agreement needed by what
the kernel does and what the bootloader expects. I'm not sure there's
any "standard" mechanism here. Do you know of any?

I know the suspend/resume on the Blackfin architecture works the same
way (at least it used to work that way years ago when I did a bit of
Blackfin stuff). And here as well, there was some cooperation between
the kernel and the bootloader. See
arch/blackfin/mach-common/dpmc_modes.S, function do_hibernate() at the
end.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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  reply	other threads:[~2014-11-21 16:59 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-21 15:59 [PATCHv3 00/16] Suspend to RAM support for Armada XP Thomas Petazzoni
2014-11-21 15:59 ` Thomas Petazzoni
2014-11-21 15:59 ` [PATCHv3 01/16] Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller Thomas Petazzoni
2014-11-21 15:59   ` Thomas Petazzoni
2014-11-21 15:59 ` [PATCHv3 02/16] ARM: mvebu: enable strex backoff delay Thomas Petazzoni
2014-11-21 15:59   ` Thomas Petazzoni
2014-11-22  0:53   ` Jason Cooper
2014-11-22  0:53     ` Jason Cooper
2014-11-25 17:44     ` Thomas Petazzoni
2014-11-25 17:44       ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 03/16] irqchip: irq-armada-370-xp: suspend/resume support Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 04/16] clocksource: time-armada-370-xp: add " Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 05/16] gpio: mvebu: " Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-28 11:55   ` Linus Walleij
2014-11-28 11:55     ` Linus Walleij
2014-11-21 16:00 ` [PATCHv3 06/16] bus: mvebu-mbus: " Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 07/16] bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 08/16] clk: mvebu: add suspend/resume for gatable clocks Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-25  6:07   ` Mike Turquette
2014-11-25  6:07     ` Mike Turquette
2014-11-25  6:07     ` Mike Turquette
2014-11-25  6:48     ` Thomas Petazzoni
2014-11-25  6:48       ` Thomas Petazzoni
2014-11-25  6:48       ` Thomas Petazzoni
2014-11-26  4:03       ` Jason Cooper
2014-11-26  4:03         ` Jason Cooper
2014-11-26  4:03         ` Jason Cooper
2014-11-21 16:00 ` [PATCHv3 09/16] ARM: mvebu: implement suspend/resume support for Armada XP Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:41   ` Andrew Lunn
2014-11-21 16:41     ` Andrew Lunn
2014-11-21 16:59     ` Thomas Petazzoni [this message]
2014-11-21 16:59       ` Thomas Petazzoni
2014-11-21 17:20       ` Andrew Lunn
2014-11-21 17:20         ` Andrew Lunn
2014-11-22  0:50         ` Jason Cooper
2014-11-22  0:50           ` Jason Cooper
2014-11-22 20:56         ` Thomas Petazzoni
2014-11-22 20:56           ` Thomas Petazzoni
2014-11-23  3:36           ` Andrew Lunn
2014-11-23  3:36             ` Andrew Lunn
2014-11-25  6:51             ` Thomas Petazzoni
2014-11-25  6:51               ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 10/16] ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 11/16] ARM: mvebu: Armada XP GP specific suspend/resume code Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 12/16] ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 13/16] ARM: mvebu: synchronize secondary CPU clocks on resume Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 14/16] ARM: mvebu: add suspend/resume DT information for Armada XP GP Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 15/16] ARM: mvebu: adjust mbus controller description on Armada 370/XP Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-21 16:00 ` [PATCHv3 16/16] ARM: mvebu: add SDRAM controller description for Armada XP Thomas Petazzoni
2014-11-21 16:00   ` Thomas Petazzoni
2014-11-22  1:44 ` [PATCHv3 00/16] Suspend to RAM support " Jason Cooper
2014-11-22  1:44   ` Jason Cooper

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