From: Tony Lindgren <tony@atomide.com>
To: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Tomasz Figa <tomasz.figa@gmail.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
linux-samsung-soc@vger.kernel.org, linux-omap@vger.kernel.org,
Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
Russell King - ARM Linux <linux@arm.linux.org.uk>,
Kukjin Kim <kgene.kim@samsung.com>,
lauraa@codeaurora.org, linus.walleij@linaro.org,
drake@endlessm.com, loeliger@gmail.com,
Mark Rutland <mark.rutland@arm.com>,
nm@ti.com, khilman@linaro.org
Subject: Re: [PATCH v10 2/8] ARM: l2c: Refactor the driver to use commit-like interface
Date: Tue, 23 Dec 2014 09:06:13 -0800 [thread overview]
Message-ID: <20141223170613.GM23854@atomide.com> (raw)
In-Reply-To: <1419331716-8972-3-git-send-email-m.szyprowski@samsung.com>
* Marek Szyprowski <m.szyprowski@samsung.com> [141223 02:51]:
> From: Tomasz Figa <t.figa@samsung.com>
>
> Certain implementations of secure hypervisors (namely the one found on
> Samsung Exynos-based boards) do not provide access to individual L2C
> registers. This makes the .write_sec()-based interface insufficient and
> provoking ugly hacks.
>
> This patch is first step to make the driver not rely on availability of
> writes to individual registers. This is achieved by refactoring the
> driver to use a commit-like operation scheme: all register values are
> prepared first and stored in an instance of l2x0_regs struct and then a
> single callback is responsible to flush those values to the hardware.
The first patch of the series applied things boot with no problem.
But after applying this one I get the following on am437x:
Unhandled fault: imprecise external abort (0xc06) at 0xb6f33884
Probably the same issue Nishanth mentioned.
Regards,
Tony
WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 2/8] ARM: l2c: Refactor the driver to use commit-like interface
Date: Tue, 23 Dec 2014 09:06:13 -0800 [thread overview]
Message-ID: <20141223170613.GM23854@atomide.com> (raw)
In-Reply-To: <1419331716-8972-3-git-send-email-m.szyprowski@samsung.com>
* Marek Szyprowski <m.szyprowski@samsung.com> [141223 02:51]:
> From: Tomasz Figa <t.figa@samsung.com>
>
> Certain implementations of secure hypervisors (namely the one found on
> Samsung Exynos-based boards) do not provide access to individual L2C
> registers. This makes the .write_sec()-based interface insufficient and
> provoking ugly hacks.
>
> This patch is first step to make the driver not rely on availability of
> writes to individual registers. This is achieved by refactoring the
> driver to use a commit-like operation scheme: all register values are
> prepared first and stored in an instance of l2x0_regs struct and then a
> single callback is responsible to flush those values to the hardware.
The first patch of the series applied things boot with no problem.
But after applying this one I get the following on am437x:
Unhandled fault: imprecise external abort (0xc06) at 0xb6f33884
Probably the same issue Nishanth mentioned.
Regards,
Tony
next prev parent reply other threads:[~2014-12-23 17:06 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-23 10:48 [PATCH v10 0/8] Enable L2 cache support on Exynos4210/4x12 SoCs Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 1/8] ARM: OMAP2+: use common l2cache initialization code Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 2/8] ARM: l2c: Refactor the driver to use commit-like interface Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 17:06 ` Tony Lindgren [this message]
2014-12-23 17:06 ` Tony Lindgren
2014-12-23 17:13 ` Nishanth Menon
2014-12-23 17:13 ` Nishanth Menon
2014-12-23 17:13 ` Nishanth Menon
2014-12-28 11:34 ` Tomasz Figa
2014-12-28 11:34 ` Tomasz Figa
2014-12-29 14:29 ` Nishanth Menon
2014-12-29 14:29 ` Nishanth Menon
2014-12-29 14:29 ` Nishanth Menon
2014-12-29 18:23 ` Nishanth Menon
2014-12-29 18:23 ` Nishanth Menon
2014-12-29 18:23 ` Nishanth Menon
2014-12-30 9:05 ` Tomasz Figa
2014-12-30 9:05 ` Tomasz Figa
2014-12-30 14:51 ` Nishanth Menon
2014-12-30 14:51 ` Nishanth Menon
2015-01-02 9:13 ` Tomasz Figa
2015-01-02 9:13 ` Tomasz Figa
2015-01-02 9:28 ` Tomasz Figa
2015-01-02 9:28 ` Tomasz Figa
2015-01-02 15:36 ` Nishanth Menon
2015-01-02 15:36 ` Nishanth Menon
2015-01-02 15:38 ` Nishanth Menon
2015-01-02 15:38 ` Nishanth Menon
2015-01-02 8:55 ` Tomasz Figa
2015-01-02 8:55 ` Tomasz Figa
2015-01-02 17:57 ` Nishanth Menon
2015-01-02 17:57 ` Nishanth Menon
2015-01-02 17:57 ` Nishanth Menon
2014-12-23 10:48 ` [PATCH v10 3/8] ARM: l2c: Add interface to ask hypervisor to configure L2C Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 4/8] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 5/8] ARM: l2c: Add support for overriding prefetch settings Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 6/8] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 7/8] ARM: EXYNOS: Add support for non-secure L2X0 resume Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
2014-12-23 10:48 ` [PATCH v10 8/8] ARM: dts: exynos4: Add nodes for L2 cache controller Marek Szyprowski
2014-12-23 10:48 ` Marek Szyprowski
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