Re: [PATCH 04/17] MIPS: Netlogic: Disable writing IRT for disabled blocks

[Jayachandran C. <jchandra@broadcom.com>]

On Wed, Jan 07, 2015 at 08:07:59PM +0300, Sergei Shtylyov wrote:
> Hello.
> 
> On 01/07/2015 02:28 PM, Jayachandran C wrote:
> 
> >If the device header of a block is not present, return invalid IRT
> >value so that we do not program an incorrect offset.
> 
> >Signed-off-by: Jayachandran C <jchandra@broadcom.com>
> >---
> >  arch/mips/netlogic/xlp/nlm_hal.c | 25 ++++++++++++++++---------
> >  1 file changed, 16 insertions(+), 9 deletions(-)
> 
> >diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c
> >index 7e0d224..de41fb5 100644
> >--- a/arch/mips/netlogic/xlp/nlm_hal.c
> >+++ b/arch/mips/netlogic/xlp/nlm_hal.c
> >@@ -170,16 +170,23 @@ static int xlp_irq_to_irt(int irq)
> >  	}
> >
> >  	if (devoff != 0) {
> >+		uint32_t val;
> >+
> >  		pcibase = nlm_pcicfg_base(devoff);
> >-		irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
> >-		/* HW weirdness, I2C IRT entry has to be fixed up */
> >-		switch (irq) {
> >-		case PIC_I2C_1_IRQ:
> >-			irt = irt + 1; break;
> >-		case PIC_I2C_2_IRQ:
> >-			irt = irt + 2; break;
> >-		case PIC_I2C_3_IRQ:
> >-			irt = irt + 3; break;
> >+		val = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG);
> >+		if (val == 0xffffffff) {
> >+			irt = -1;
> >+		} else {
> >+			irt = val & 0xffff;
> >+			/* HW weirdness, I2C IRT entry has to be fixed up */
> >+			switch (irq) {
> >+			case PIC_I2C_1_IRQ:
> >+				irt = irt + 1; break;
> >+			case PIC_I2C_2_IRQ:
> >+				irt = irt + 2; break;
> >+			case PIC_I2C_3_IRQ:
> >+				irt = irt + 3; break;
> 
>    Why not 'irt += n' in all 3 cases?
>    And don't place *break* on the same line -- this upsets checkpatch.pl IIRC.

checkpatch did not complain, and also I did not want to mix formatting
change with actual fix. But agree that the code can cleaned up a bit.
I will sent out a patch for this next cycle.

JC.