From: Tony Lindgren <tony@atomide.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Nishanth Menon <nm@ti.com>, Mark Rutland <Mark.Rutland@arm.com>,
Linus Walleij <linus.walleij@linaro.org>,
Stefan Agner <stefan@agner.ch>,
Thierry Reding <thierry.reding@gmail.com>,
Jason Cooper <jason@lakedaemon.net>,
Alexandre Courbot <gnurou@gmail.com>,
Kukjin Kim <kgene.kim@samsung.com>,
Pankaj Dubey <pankaj.dubey@samsung.com>,
Magnus Damm <magnus.damm@gmail.com>,
Michal Simek <michal.simek@xilinx.com>,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
Benoit Cousson <bcousson@baylibre.com>,
Stephen Warren <swarren@wwwdotorg.org>,
Simon Horman <horms@verge.net.au>,
Santosh Shilimkar <ssantosh@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Felipe Balbi <balbi@ti.com>, Rob Herring <robh+dt@kernel.org>,
Sasc
Subject: Re: [PATCH v4 13/21] ARM: omap: convert wakeupgen to stacked domains
Date: Wed, 21 Jan 2015 10:36:16 -0800 [thread overview]
Message-ID: <20150121183615.GS7718@atomide.com> (raw)
In-Reply-To: <54BFE05E.9080403@arm.com>
* Marc Zyngier <marc.zyngier@arm.com> [150121 09:25]:
> On 21/01/15 16:30, Tony Lindgren wrote:
>
> > I gave this a quick boot test on am437x-gp-evm and the
> > interrupts look OK with the fix also applied:
> >
> > # cat /proc/interrupts
> > CPU0
> > 16: 657 WUGEN 68 gp_timer
> > 18: 0 WUGEN 9 l3-dbg-irq
> > 19: 0 WUGEN 10 l3-app-irq
> > 20: 5 WUGEN 12 edma
> > 22: 0 WUGEN 14 edma_error
> > 23: 96 WUGEN 72 OMAP UART0
> > 33: 0 44e07000.gpio 6 mmc0
> > 158: 52 WUGEN 70 44e0b000.i2c
> > 159: 0 WUGEN 71 4802a000.i2c
> > 160: 35 WUGEN 64 mmc0
> > 161: 0 WUGEN 40 4a100000.ethernet
> > 162: 7739 WUGEN 41 4a100000.ethernet
> > 163: 7608 WUGEN 42 4a100000.ethernet
> > 164: 0 WUGEN 43 4a100000.ethernet
> > 170: 0 WUGEN 100 gpmc
> > 180: 0 WUGEN 7 tps65218
> > IPI0: 0 CPU wakeup interrupts
> > IPI1: 0 Timer broadcast interrupts
> > IPI2: 0 Rescheduling interrupts
> > IPI3: 0 Function call interrupts
> > IPI4: 0 Single function call interrupts
> > IPI5: 0 CPU stop interrupts
> > IPI6: 0 IRQ work interrupts
> > IPI7: 0 completion interrupts
> > Err: 0
>
> Interesting. No TWD timer on this one?
Good question, adding Felipe to cc. It eems to be there in
the TRM in "Table 2-3. L4_PER Peripheral Memory Map" as
MPU_PRV_TIMERS. Also seems to actually work with the
attached patch:
# cat /proc/interrupts
CPU0
16: 0 WUGEN 67 gp_timer
17: 529 GIC 29 twd
18: 0 WUGEN 9 l3-dbg-irq
19: 0 WUGEN 10 l3-app-irq
20: 5 WUGEN 12 edma
22: 0 WUGEN 14 edma_error
23: 130 WUGEN 72 OMAP UART0
34: 0 44e07000.gpio 6 mmc0
159: 52 WUGEN 70 44e0b000.i2c
160: 0 WUGEN 71 4802a000.i2c
161: 35 WUGEN 64 mmc0
162: 0 WUGEN 40 4a100000.ethernet
163: 8033 WUGEN 41 4a100000.ethernet
164: 7769 WUGEN 42 4a100000.ethernet
165: 0 WUGEN 43 4a100000.ethernet
171: 0 WUGEN 100 gpmc
181: 0 WUGEN 7 tps65218
IPI0: 0 CPU wakeup interrupts
IPI1: 0 Timer broadcast interrupts
IPI2: 0 Rescheduling interrupts
IPI3: 0 Function call interrupts
IPI4: 0 Single function call interrupts
IPI5: 0 CPU stop interrupts
IPI6: 0 IRQ work interrupts
IPI7: 0 completion interrupts
Err: 0
Hmm I wonder why we have the !is_smp() check in the TWD timer?
Regards,
Tony
8< -------------------
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -51,6 +51,14 @@
interrupt-parent = <&gic>;
};
+ local-timer@48240600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ clocks = <&dpll_mpu_m2_ck>;
+ reg = <0x48240600 0x20>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
+ };
+
wakeupgen: interrupt-controller@48281000 {
compatible = "ti,omap4-wugen-mpu";
interrupt-controller;
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -388,7 +388,7 @@ static void __init twd_local_timer_of_register(struct device_node *np)
{
int err;
- if (!is_smp() || !setup_max_cpus)
+ if (!setup_max_cpus)
return;
twd_ppi = irq_of_parse_and_map(np, 0);
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -237,7 +237,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
.init_late = am43xx_init_late,
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap4_local_timer_init,
.dt_compat = am43_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 13/21] ARM: omap: convert wakeupgen to stacked domains
Date: Wed, 21 Jan 2015 10:36:16 -0800 [thread overview]
Message-ID: <20150121183615.GS7718@atomide.com> (raw)
In-Reply-To: <54BFE05E.9080403@arm.com>
* Marc Zyngier <marc.zyngier@arm.com> [150121 09:25]:
> On 21/01/15 16:30, Tony Lindgren wrote:
>
> > I gave this a quick boot test on am437x-gp-evm and the
> > interrupts look OK with the fix also applied:
> >
> > # cat /proc/interrupts
> > CPU0
> > 16: 657 WUGEN 68 gp_timer
> > 18: 0 WUGEN 9 l3-dbg-irq
> > 19: 0 WUGEN 10 l3-app-irq
> > 20: 5 WUGEN 12 edma
> > 22: 0 WUGEN 14 edma_error
> > 23: 96 WUGEN 72 OMAP UART0
> > 33: 0 44e07000.gpio 6 mmc0
> > 158: 52 WUGEN 70 44e0b000.i2c
> > 159: 0 WUGEN 71 4802a000.i2c
> > 160: 35 WUGEN 64 mmc0
> > 161: 0 WUGEN 40 4a100000.ethernet
> > 162: 7739 WUGEN 41 4a100000.ethernet
> > 163: 7608 WUGEN 42 4a100000.ethernet
> > 164: 0 WUGEN 43 4a100000.ethernet
> > 170: 0 WUGEN 100 gpmc
> > 180: 0 WUGEN 7 tps65218
> > IPI0: 0 CPU wakeup interrupts
> > IPI1: 0 Timer broadcast interrupts
> > IPI2: 0 Rescheduling interrupts
> > IPI3: 0 Function call interrupts
> > IPI4: 0 Single function call interrupts
> > IPI5: 0 CPU stop interrupts
> > IPI6: 0 IRQ work interrupts
> > IPI7: 0 completion interrupts
> > Err: 0
>
> Interesting. No TWD timer on this one?
Good question, adding Felipe to cc. It eems to be there in
the TRM in "Table 2-3. L4_PER Peripheral Memory Map" as
MPU_PRV_TIMERS. Also seems to actually work with the
attached patch:
# cat /proc/interrupts
CPU0
16: 0 WUGEN 67 gp_timer
17: 529 GIC 29 twd
18: 0 WUGEN 9 l3-dbg-irq
19: 0 WUGEN 10 l3-app-irq
20: 5 WUGEN 12 edma
22: 0 WUGEN 14 edma_error
23: 130 WUGEN 72 OMAP UART0
34: 0 44e07000.gpio 6 mmc0
159: 52 WUGEN 70 44e0b000.i2c
160: 0 WUGEN 71 4802a000.i2c
161: 35 WUGEN 64 mmc0
162: 0 WUGEN 40 4a100000.ethernet
163: 8033 WUGEN 41 4a100000.ethernet
164: 7769 WUGEN 42 4a100000.ethernet
165: 0 WUGEN 43 4a100000.ethernet
171: 0 WUGEN 100 gpmc
181: 0 WUGEN 7 tps65218
IPI0: 0 CPU wakeup interrupts
IPI1: 0 Timer broadcast interrupts
IPI2: 0 Rescheduling interrupts
IPI3: 0 Function call interrupts
IPI4: 0 Single function call interrupts
IPI5: 0 CPU stop interrupts
IPI6: 0 IRQ work interrupts
IPI7: 0 completion interrupts
Err: 0
Hmm I wonder why we have the !is_smp() check in the TWD timer?
Regards,
Tony
8< -------------------
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -51,6 +51,14 @@
interrupt-parent = <&gic>;
};
+ local-timer at 48240600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ clocks = <&dpll_mpu_m2_ck>;
+ reg = <0x48240600 0x20>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
+ };
+
wakeupgen: interrupt-controller at 48281000 {
compatible = "ti,omap4-wugen-mpu";
interrupt-controller;
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -388,7 +388,7 @@ static void __init twd_local_timer_of_register(struct device_node *np)
{
int err;
- if (!is_smp() || !setup_max_cpus)
+ if (!setup_max_cpus)
return;
twd_ppi = irq_of_parse_and_map(np, 0);
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -237,7 +237,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
.init_late = am43xx_init_late,
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap4_local_timer_init,
.dt_compat = am43_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
next prev parent reply other threads:[~2015-01-21 18:36 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-19 9:43 [PATCH v4 00/21] irqchip: gic: killing gic_arch_extn and co, slowly Marc Zyngier
2015-01-19 9:43 ` Marc Zyngier
2015-01-19 9:43 ` [PATCH v4 01/21] ARM: tegra: irq: nuke leftovers from non-DT support Marc Zyngier
2015-01-19 9:43 ` Marc Zyngier
2015-01-19 9:43 ` [PATCH v4 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
2015-01-19 9:43 ` Marc Zyngier
2015-01-20 7:51 ` Peter De Schrijver
2015-01-20 7:51 ` Peter De Schrijver
2015-01-19 9:43 ` [PATCH v4 03/21] ARM: tegra: skip gic_arch_extn setup if DT has a LIC node Marc Zyngier
2015-01-19 9:43 ` Marc Zyngier
2015-01-19 9:43 ` [PATCH v4 04/21] ARM: tegra: update DTs to expose legacy interrupt controller Marc Zyngier
2015-01-19 9:43 ` Marc Zyngier
2015-01-19 9:43 ` [PATCH v4 05/21] DT: tegra: add binding for the " Marc Zyngier
2015-01-19 9:43 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 06/21] ARM: tegra: remove old LIC support Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 07/21] genirq: Add irqchip_set_wake_parent Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 08/21] irqchip: crossbar: convert dra7 crossbar to stacked domains Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 09/21] DT: update ti,irq-crossbar binding Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 10/21] irqchip: GIC: get rid of routable domain Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 11/21] DT: arm,gic: kill arm,routable-irqs Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 12/21] DT: omap4/5: add binding for the wake-up generator Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-21 16:26 ` Tony Lindgren
2015-01-21 16:26 ` Tony Lindgren
2015-01-19 9:44 ` [PATCH v4 13/21] ARM: omap: convert wakeupgen to stacked domains Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-21 16:30 ` Tony Lindgren
2015-01-21 16:30 ` Tony Lindgren
2015-01-21 17:22 ` Marc Zyngier
2015-01-21 17:22 ` Marc Zyngier
2015-01-21 18:36 ` Tony Lindgren [this message]
2015-01-21 18:36 ` Tony Lindgren
2015-01-21 20:12 ` santosh shilimkar
2015-01-21 20:12 ` santosh shilimkar
2015-01-21 20:43 ` Tony Lindgren
2015-01-21 20:43 ` Tony Lindgren
2015-01-21 21:28 ` santosh shilimkar
2015-01-21 21:28 ` santosh shilimkar
2015-01-21 21:37 ` Tony Lindgren
2015-01-21 21:37 ` Tony Lindgren
2015-01-19 9:44 ` [PATCH v4 14/21] ARM: imx6: convert GPC " Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 10:47 ` Lucas Stach
2015-01-19 10:47 ` Lucas Stach
2015-01-19 11:12 ` Marc Zyngier
2015-01-19 11:12 ` Marc Zyngier
2015-01-20 11:19 ` Shawn Guo
2015-01-20 11:19 ` Shawn Guo
2015-01-19 9:44 ` [PATCH v4 15/21] ARM: exynos4/5: convert pmu wakeup " Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-20 7:42 ` Pankaj Dubey
2015-01-20 7:42 ` Pankaj Dubey
2015-01-20 9:43 ` Marc Zyngier
2015-01-20 9:43 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 16/21] DT: exynos: update PMU binding Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-20 7:47 ` Pankaj Dubey
2015-01-20 7:47 ` Pankaj Dubey
2015-01-19 9:44 ` [PATCH v4 17/21] irqchip: gic: add an entry point to set up irqchip flags Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 18/21] ARM: shmobile: remove use of gic_arch_extn.irq_set_wake Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 19/21] ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 20/21] ARM: zynq: " Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
2015-01-19 9:44 ` [PATCH v4 21/21] irqchip: gic: Drop support for gic_arch_extn Marc Zyngier
2015-01-19 9:44 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150121183615.GS7718@atomide.com \
--to=tony@atomide.com \
--cc=Mark.Rutland@arm.com \
--cc=balbi@ti.com \
--cc=bcousson@baylibre.com \
--cc=gnurou@gmail.com \
--cc=horms@verge.net.au \
--cc=jason@lakedaemon.net \
--cc=kgene.kim@samsung.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=magnus.damm@gmail.com \
--cc=marc.zyngier@arm.com \
--cc=michal.simek@xilinx.com \
--cc=nm@ti.com \
--cc=pankaj.dubey@samsung.com \
--cc=robh+dt@kernel.org \
--cc=ssantosh@kernel.org \
--cc=stefan@agner.ch \
--cc=swarren@wwwdotorg.org \
--cc=tglx@linutronix.de \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.