Re: [PATCH 1/4] arm: omap: hwmod: 43xx: add DebugSS hwmod data

[Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>]

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Hi,

On Mon, Jan 26, 2015 at 02:04:35AM +0000, Paul Walmsley wrote:
> Hi
> 
> the references below are from SPRUHL7
> 
> On Fri, 23 Jan 2015, Felipe Balbi wrote:
> 
> > Without hwmod data for DebugSS, performance monitors
> > have no chance of running on AM43xx devices.
> > 
> > Signed-off-by: Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>
> > ---
> >  arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 40 ++++++++++++++++++++++++++++++
> >  arch/arm/mach-omap2/prcm43xx.h             |  1 +
> >  2 files changed, 41 insertions(+)
> > 
> > diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
> > index 5c6c8410160e..6709704dd5b5 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
> > @@ -19,6 +19,7 @@
> >  #include "omap_hwmod.h"
> >  #include "omap_hwmod_33xx_43xx_common_data.h"
> >  #include "prcm43xx.h"
> > +#include "prm44xx.h"
> >  #include "omap_hwmod_common_data.h"
> >  
> >  
> > @@ -60,6 +61,44 @@ static struct omap_hwmod am43xx_wkup_m3_hwmod = {
> >  	.rst_lines_cnt	= ARRAY_SIZE(am33xx_wkup_m3_resets),
> >  };
> >  
> > +/*
> > + * 'debugss' class
> > + * debug and emulation sub system
> > + */
> > +static struct omap_hwmod_opt_clk am43xx_debugss_opt_clks[] = {
> > +	{ .role = "dbg_sysclk", .clk = "dbg_sysclk_ck" },
> > +	{ .role = "dbg_clka", .clk = "dbg_clka_ck", },
> > +	{ .role = "dbg_clkb", .clk = "dbg_clkb_ck", },
> > +	{ .role = "dbg_clkc", .clk = "dbg_clkc_ck", },
> > +};
> > +
> > +static struct omap_hwmod_class am43xx_debugss_hwmod_class = {
> > +	.name	= "debugss",
> > +};
> > +
> > +/* debugss */
> > +static struct omap_hwmod am43xx_debugss_hwmod = {
> > +	.name		= "debugss",
> > +	.class		= &am43xx_debugss_hwmod_class,
> > +	.clkdm_name	= "l3_aon_clkdm",
> > +	.main_clk	= "trace_clk_div_ck",
> > +	.prcm = {
> > +		.omap4 = {
> > +			.clkctrl_offs = AM43XX_CM_WKUP_DBGSS_CLKCTRL_OFFSET,
> 
> According to Table 6-275 "PRCM_CM_WKUP_DBGSS_CLKCTRL Register Field 
> Descriptions" this should have a 
> 
> 			.modulemode   = MODULEMODE_SWCTRL,

hm... modulemode SWCTRL causes wait_target_ready to fail. Any hints ?

> > +		},
> > +	},
> > +	.opt_clks	= am43xx_debugss_opt_clks,
> > +	.opt_clks_cnt	= ARRAY_SIZE(am43xx_debugss_opt_clks),
> > +};
> > +
> > +/* debugss -> l3_main_2 */
> > +static struct omap_hwmod_ocp_if am43xx_debugss__l3_main = {
> > +	.master		= &am43xx_debugss_hwmod,
> > +	.slave		= &am33xx_l3_main_hwmod,
> > +	.clk		= "sys_clkin_ck",
> > +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> > +};
> > +
> 
> According to Table 31-25 "Debug Modules Memory Mapping" there are a few 
> initiator ports on the DEBUGSS that are connected to various slave ports 
> on various chip-wide interconnects: L3_EMU, L4_PER, L4_WAKEUP, L4_CFG. I 
> would suggest starting by adding at least one of them as a struct 
> omap_hwmod_ocp_if record.  The one attached to L3_EMU would seem like a 
> good one to start with.

I'll have a look.

-- 
balbi

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