From: Jisheng Zhang <jszhang@marvell.com>
To: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: "thomas.petazzoni@free-electrons.com"
<thomas.petazzoni@free-electrons.com>,
Jimmy Xu <zmxu@marvell.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"ezequiel.garcia@free-electrons.com"
<ezequiel.garcia@free-electrons.com>,
"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"sebastian.hesselbarth@gmail.com"
<sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH 2/9] mtd: pxa3xx_nand: add a non mandatory ECC clock
Date: Wed, 28 Jan 2015 11:35:52 +0800 [thread overview]
Message-ID: <20150128113552.5dd3edc4@xhacker> (raw)
In-Reply-To: <1422367816-4257-3-git-send-email-antoine.tenart@free-electrons.com>
Dear Antoine,
On Tue, 27 Jan 2015 06:10:09 -0800
Antoine Tenart <antoine.tenart@free-electrons.com> wrote:
> Some controllers (as the coming Berlin nand controller) need to enable
> an ECC clock. Add support for this clock in the pxa3xx nand driver, and
> leave it as non mandatory.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> ---
> drivers/mtd/nand/pxa3xx_nand.c | 26 +++++++++++++++++++-------
> 1 file changed, 19 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index d00ac392d1c4..2681ec4abafa 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -180,7 +180,7 @@ struct pxa3xx_nand_info {
> struct nand_hw_control controller;
> struct platform_device *pdev;
>
> - struct clk *clk;
> + struct clk *clk, *ecc_clk;
> void __iomem *mmio_base;
> unsigned long mmio_phys;
> struct completion cmd_complete, dev_ready;
> @@ -1608,7 +1608,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev)
> spin_lock_init(&chip->controller->lock);
> init_waitqueue_head(&chip->controller->wq);
> - info->clk = devm_clk_get(&pdev->dev, NULL);
> + info->clk = devm_clk_get(&pdev->dev, "nfc");
> if (IS_ERR(info->clk)) {
Do we need to fall back to unnamed clock here? Otherwise I guess it will break
other platforms.
> dev_err(&pdev->dev, "failed to get nand clock\n");
> return PTR_ERR(info->clk);
> @@ -1617,6 +1617,13 @@ static int alloc_nand_resource(struct
> platform_device *pdev) if (ret < 0)
> return ret;
>
> + info->ecc_clk = devm_clk_get(&pdev->dev, "ecc");
> + if (!IS_ERR(info->ecc_clk)) {
> + ret = clk_prepare_enable(info->ecc_clk);
> + if (ret < 0)
> + goto fail_disable_clk;
> + }
> +
> if (use_dma) {
> /*
> * This is a dirty hack to make this driver work from
> @@ -1633,7 +1640,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) dev_err(&pdev->dev,
> "no resource defined for data
> DMA\n"); ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->drcmr_dat = r->start;
>
> @@ -1642,7 +1649,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) dev_err(&pdev->dev,
> "no resource defined for cmd
> DMA\n"); ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->drcmr_cmd = r->start;
> }
> @@ -1652,14 +1659,14 @@ static int alloc_nand_resource(struct
> platform_device *pdev) if (irq < 0) {
> dev_err(&pdev->dev, "no IRQ resource defined\n");
> ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
>
> r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> info->mmio_base = devm_ioremap_resource(&pdev->dev, r);
> if (IS_ERR(info->mmio_base)) {
> ret = PTR_ERR(info->mmio_base);
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->mmio_phys = r->start;
>
> @@ -1668,7 +1675,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) info->data_buff = kmalloc(info->buf_size, GFP_KERNEL);
> if (info->data_buff == NULL) {
> ret = -ENOMEM;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
>
> /* initialize all interrupts to be disabled */
> @@ -1687,6 +1694,9 @@ static int alloc_nand_resource(struct platform_device
> *pdev) fail_free_buf:
> free_irq(irq, info);
> kfree(info->data_buff);
> +fail_disable_ecc_clk:
> + if (!IS_ERR(info->ecc_clk))
> + clk_disable_unprepare(info->ecc_clk);
we can remove the IS_ERR check to simplify this error path since commit
63589e92c2d9("clk: Ignore error and NULL pointers passed to clk_{unprepare, disable}()")
> fail_disable_clk:
> clk_disable_unprepare(info->clk);
> return ret;
> @@ -1709,6 +1719,8 @@ static int pxa3xx_nand_remove(struct platform_device
> *pdev) pxa3xx_nand_free_buff(info);
>
> clk_disable_unprepare(info->clk);
> + if (!IS_ERR(info->ecc_clk))
> + clk_disable_unprepare(info->ecc_clk);
we can remove the IS_ERR check too.
>
> for (cs = 0; cs < pdata->num_cs; cs++)
> nand_release(info->host[cs]->mtd);
WARNING: multiple messages have this Message-ID (diff)
From: jszhang@marvell.com (Jisheng Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/9] mtd: pxa3xx_nand: add a non mandatory ECC clock
Date: Wed, 28 Jan 2015 11:35:52 +0800 [thread overview]
Message-ID: <20150128113552.5dd3edc4@xhacker> (raw)
In-Reply-To: <1422367816-4257-3-git-send-email-antoine.tenart@free-electrons.com>
Dear Antoine,
On Tue, 27 Jan 2015 06:10:09 -0800
Antoine Tenart <antoine.tenart@free-electrons.com> wrote:
> Some controllers (as the coming Berlin nand controller) need to enable
> an ECC clock. Add support for this clock in the pxa3xx nand driver, and
> leave it as non mandatory.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> ---
> drivers/mtd/nand/pxa3xx_nand.c | 26 +++++++++++++++++++-------
> 1 file changed, 19 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index d00ac392d1c4..2681ec4abafa 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -180,7 +180,7 @@ struct pxa3xx_nand_info {
> struct nand_hw_control controller;
> struct platform_device *pdev;
>
> - struct clk *clk;
> + struct clk *clk, *ecc_clk;
> void __iomem *mmio_base;
> unsigned long mmio_phys;
> struct completion cmd_complete, dev_ready;
> @@ -1608,7 +1608,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev)
> spin_lock_init(&chip->controller->lock);
> init_waitqueue_head(&chip->controller->wq);
> - info->clk = devm_clk_get(&pdev->dev, NULL);
> + info->clk = devm_clk_get(&pdev->dev, "nfc");
> if (IS_ERR(info->clk)) {
Do we need to fall back to unnamed clock here? Otherwise I guess it will break
other platforms.
> dev_err(&pdev->dev, "failed to get nand clock\n");
> return PTR_ERR(info->clk);
> @@ -1617,6 +1617,13 @@ static int alloc_nand_resource(struct
> platform_device *pdev) if (ret < 0)
> return ret;
>
> + info->ecc_clk = devm_clk_get(&pdev->dev, "ecc");
> + if (!IS_ERR(info->ecc_clk)) {
> + ret = clk_prepare_enable(info->ecc_clk);
> + if (ret < 0)
> + goto fail_disable_clk;
> + }
> +
> if (use_dma) {
> /*
> * This is a dirty hack to make this driver work from
> @@ -1633,7 +1640,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) dev_err(&pdev->dev,
> "no resource defined for data
> DMA\n"); ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->drcmr_dat = r->start;
>
> @@ -1642,7 +1649,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) dev_err(&pdev->dev,
> "no resource defined for cmd
> DMA\n"); ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->drcmr_cmd = r->start;
> }
> @@ -1652,14 +1659,14 @@ static int alloc_nand_resource(struct
> platform_device *pdev) if (irq < 0) {
> dev_err(&pdev->dev, "no IRQ resource defined\n");
> ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
>
> r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> info->mmio_base = devm_ioremap_resource(&pdev->dev, r);
> if (IS_ERR(info->mmio_base)) {
> ret = PTR_ERR(info->mmio_base);
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->mmio_phys = r->start;
>
> @@ -1668,7 +1675,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) info->data_buff = kmalloc(info->buf_size, GFP_KERNEL);
> if (info->data_buff == NULL) {
> ret = -ENOMEM;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
>
> /* initialize all interrupts to be disabled */
> @@ -1687,6 +1694,9 @@ static int alloc_nand_resource(struct platform_device
> *pdev) fail_free_buf:
> free_irq(irq, info);
> kfree(info->data_buff);
> +fail_disable_ecc_clk:
> + if (!IS_ERR(info->ecc_clk))
> + clk_disable_unprepare(info->ecc_clk);
we can remove the IS_ERR check to simplify this error path since commit
63589e92c2d9("clk: Ignore error and NULL pointers passed to clk_{unprepare, disable}()")
> fail_disable_clk:
> clk_disable_unprepare(info->clk);
> return ret;
> @@ -1709,6 +1719,8 @@ static int pxa3xx_nand_remove(struct platform_device
> *pdev) pxa3xx_nand_free_buff(info);
>
> clk_disable_unprepare(info->clk);
> + if (!IS_ERR(info->ecc_clk))
> + clk_disable_unprepare(info->ecc_clk);
we can remove the IS_ERR check too.
>
> for (cs = 0; cs < pdata->num_cs; cs++)
> nand_release(info->host[cs]->mtd);
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@marvell.com>
To: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: "sebastian.hesselbarth@gmail.com"
<sebastian.hesselbarth@gmail.com>,
"ezequiel.garcia@free-electrons.com"
<ezequiel.garcia@free-electrons.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>,
"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
"thomas.petazzoni@free-electrons.com"
<thomas.petazzoni@free-electrons.com>,
Jimmy Xu <zmxu@marvell.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/9] mtd: pxa3xx_nand: add a non mandatory ECC clock
Date: Wed, 28 Jan 2015 11:35:52 +0800 [thread overview]
Message-ID: <20150128113552.5dd3edc4@xhacker> (raw)
In-Reply-To: <1422367816-4257-3-git-send-email-antoine.tenart@free-electrons.com>
Dear Antoine,
On Tue, 27 Jan 2015 06:10:09 -0800
Antoine Tenart <antoine.tenart@free-electrons.com> wrote:
> Some controllers (as the coming Berlin nand controller) need to enable
> an ECC clock. Add support for this clock in the pxa3xx nand driver, and
> leave it as non mandatory.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> ---
> drivers/mtd/nand/pxa3xx_nand.c | 26 +++++++++++++++++++-------
> 1 file changed, 19 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index d00ac392d1c4..2681ec4abafa 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -180,7 +180,7 @@ struct pxa3xx_nand_info {
> struct nand_hw_control controller;
> struct platform_device *pdev;
>
> - struct clk *clk;
> + struct clk *clk, *ecc_clk;
> void __iomem *mmio_base;
> unsigned long mmio_phys;
> struct completion cmd_complete, dev_ready;
> @@ -1608,7 +1608,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev)
> spin_lock_init(&chip->controller->lock);
> init_waitqueue_head(&chip->controller->wq);
> - info->clk = devm_clk_get(&pdev->dev, NULL);
> + info->clk = devm_clk_get(&pdev->dev, "nfc");
> if (IS_ERR(info->clk)) {
Do we need to fall back to unnamed clock here? Otherwise I guess it will break
other platforms.
> dev_err(&pdev->dev, "failed to get nand clock\n");
> return PTR_ERR(info->clk);
> @@ -1617,6 +1617,13 @@ static int alloc_nand_resource(struct
> platform_device *pdev) if (ret < 0)
> return ret;
>
> + info->ecc_clk = devm_clk_get(&pdev->dev, "ecc");
> + if (!IS_ERR(info->ecc_clk)) {
> + ret = clk_prepare_enable(info->ecc_clk);
> + if (ret < 0)
> + goto fail_disable_clk;
> + }
> +
> if (use_dma) {
> /*
> * This is a dirty hack to make this driver work from
> @@ -1633,7 +1640,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) dev_err(&pdev->dev,
> "no resource defined for data
> DMA\n"); ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->drcmr_dat = r->start;
>
> @@ -1642,7 +1649,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) dev_err(&pdev->dev,
> "no resource defined for cmd
> DMA\n"); ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->drcmr_cmd = r->start;
> }
> @@ -1652,14 +1659,14 @@ static int alloc_nand_resource(struct
> platform_device *pdev) if (irq < 0) {
> dev_err(&pdev->dev, "no IRQ resource defined\n");
> ret = -ENXIO;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
>
> r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> info->mmio_base = devm_ioremap_resource(&pdev->dev, r);
> if (IS_ERR(info->mmio_base)) {
> ret = PTR_ERR(info->mmio_base);
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
> info->mmio_phys = r->start;
>
> @@ -1668,7 +1675,7 @@ static int alloc_nand_resource(struct platform_device
> *pdev) info->data_buff = kmalloc(info->buf_size, GFP_KERNEL);
> if (info->data_buff == NULL) {
> ret = -ENOMEM;
> - goto fail_disable_clk;
> + goto fail_disable_ecc_clk;
> }
>
> /* initialize all interrupts to be disabled */
> @@ -1687,6 +1694,9 @@ static int alloc_nand_resource(struct platform_device
> *pdev) fail_free_buf:
> free_irq(irq, info);
> kfree(info->data_buff);
> +fail_disable_ecc_clk:
> + if (!IS_ERR(info->ecc_clk))
> + clk_disable_unprepare(info->ecc_clk);
we can remove the IS_ERR check to simplify this error path since commit
63589e92c2d9("clk: Ignore error and NULL pointers passed to clk_{unprepare, disable}()")
> fail_disable_clk:
> clk_disable_unprepare(info->clk);
> return ret;
> @@ -1709,6 +1719,8 @@ static int pxa3xx_nand_remove(struct platform_device
> *pdev) pxa3xx_nand_free_buff(info);
>
> clk_disable_unprepare(info->clk);
> + if (!IS_ERR(info->ecc_clk))
> + clk_disable_unprepare(info->ecc_clk);
we can remove the IS_ERR check too.
>
> for (cs = 0; cs < pdata->num_cs; cs++)
> nand_release(info->host[cs]->mtd);
next prev parent reply other threads:[~2015-01-28 3:35 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-27 14:10 [PATCH 0/9] ARM: berlin: add nand support Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 1/9] mtd: pxa3xx_nand: initialiaze pxa3xx_flash_ids to 0 Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 2/9] mtd: pxa3xx_nand: add a non mandatory ECC clock Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 15:50 ` Andrew Lunn
2015-01-27 15:50 ` Andrew Lunn
2015-01-27 15:50 ` Andrew Lunn
2015-01-28 14:14 ` Antoine Tenart
2015-01-28 14:14 ` Antoine Tenart
2015-01-28 14:14 ` Antoine Tenart
2015-02-08 19:55 ` Boris Brezillon
2015-02-08 19:55 ` Boris Brezillon
2015-02-08 19:55 ` Boris Brezillon
2015-01-28 3:35 ` Jisheng Zhang [this message]
2015-01-28 3:35 ` Jisheng Zhang
2015-01-28 3:35 ` Jisheng Zhang
2015-01-28 14:17 ` Antoine Tenart
2015-01-28 14:17 ` Antoine Tenart
2015-01-28 14:17 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 3/9] mtd: pxa3xx_nand: set NDCR_PG_PER_BLK if page per block is 128 Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-02-08 20:00 ` Boris Brezillon
2015-02-08 20:00 ` Boris Brezillon
2015-02-08 20:00 ` Boris Brezillon
2015-01-27 14:10 ` [PATCH 4/9] mtd: pxa3xx_nand: add a default chunk size Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-02-08 20:15 ` Boris Brezillon
2015-02-08 20:15 ` Boris Brezillon
2015-02-08 20:15 ` Boris Brezillon
2015-02-08 20:18 ` Boris Brezillon
2015-02-08 20:18 ` Boris Brezillon
2015-02-08 20:18 ` Boris Brezillon
2015-01-27 14:10 ` [PATCH 5/9] mtd: pxa3xx_nand: add support for the Marvell Berlin nand controller Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:42 ` Ezequiel Garcia
2015-01-27 14:42 ` Ezequiel Garcia
2015-01-27 14:42 ` Ezequiel Garcia
2015-02-06 1:25 ` Brian Norris
2015-02-06 1:25 ` Brian Norris
2015-02-06 1:25 ` Brian Norris
2015-02-08 21:06 ` Boris Brezillon
2015-02-08 21:06 ` Boris Brezillon
2015-02-08 21:06 ` Boris Brezillon
2015-02-11 16:27 ` Antoine Tenart
2015-02-11 16:27 ` Antoine Tenart
2015-02-11 16:27 ` Antoine Tenart
2015-02-08 23:55 ` Boris Brezillon
2015-02-08 23:55 ` Boris Brezillon
2015-02-08 23:55 ` Boris Brezillon
2015-02-10 19:50 ` Robert Jarzmik
2015-02-10 19:50 ` Robert Jarzmik
2015-02-10 19:50 ` Robert Jarzmik
2015-02-11 16:33 ` Antoine Tenart
2015-02-11 16:33 ` Antoine Tenart
2015-02-11 16:33 ` Antoine Tenart
2015-02-12 16:26 ` Robert Jarzmik
2015-02-12 16:26 ` Robert Jarzmik
2015-02-12 16:26 ` Robert Jarzmik
2015-02-17 9:52 ` Antoine Tenart
2015-02-17 9:52 ` Antoine Tenart
2015-02-17 9:52 ` Antoine Tenart
2015-02-11 16:31 ` Antoine Tenart
2015-02-11 16:31 ` Antoine Tenart
2015-02-11 16:31 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 6/9] Documentation: bindings: add the Berlin nand controller compatible Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 7/9] mtd: nand: let Marvell Berlin SoCs select the pxa3xx driver Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 8/9] ARM: berlin: add BG2Q node for the nand Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` [PATCH 9/9] ARM: berlin: enable flash on the BG2Q DMP Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
2015-01-27 14:10 ` Antoine Tenart
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