From: Albert ARIBAUD <albert.u.boot@aribaud.net>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] arm/ls1021a: Add workaround for DDR erratum A008378
Date: Sun, 1 Feb 2015 03:12:28 +0100 [thread overview]
Message-ID: <20150201031228.7e1e229c@lilith> (raw)
In-Reply-To: <1421268367-27117-1-git-send-email-yorksun@freescale.com>
Hello York Sun,
On Wed, 14 Jan 2015 12:46:07 -0800, York Sun <yorksun@freescale.com>
wrote:
> Internal memory controller counters can reach a bad state after
> training in DDR4 mode if accumulated ECC or DBI mode is eanbled.
typo: eanbled -> enabled.
Amicalement,
--
Albert.
next prev parent reply other threads:[~2015-02-01 2:12 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-14 20:46 [U-Boot] [PATCH v2] arm/ls1021a: Add workaround for DDR erratum A008378 York Sun
2015-02-01 2:12 ` Albert ARIBAUD [this message]
2015-02-02 14:40 ` York Sun
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