From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] arm/ls1021a: Add workaround for DDR erratum A008378
Date: Mon, 2 Feb 2015 08:40:34 -0600 [thread overview]
Message-ID: <54CF8C62.3090506@freescale.com> (raw)
In-Reply-To: <20150201031228.7e1e229c@lilith>
On 01/31/2015 08:12 PM, Albert ARIBAUD wrote:
> Hello York Sun,
>
> On Wed, 14 Jan 2015 12:46:07 -0800, York Sun <yorksun@freescale.com>
> wrote:
>> Internal memory controller counters can reach a bad state after
>> training in DDR4 mode if accumulated ECC or DBI mode is eanbled.
>
> typo: eanbled -> enabled.
>
Thanks for catching it.
York
prev parent reply other threads:[~2015-02-02 14:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-14 20:46 [U-Boot] [PATCH v2] arm/ls1021a: Add workaround for DDR erratum A008378 York Sun
2015-02-01 2:12 ` Albert ARIBAUD
2015-02-02 14:40 ` York Sun [this message]
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