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From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 06/10] ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi
Date: Sun, 1 Feb 2015 15:17:50 +0100	[thread overview]
Message-ID: <20150201141750.GG4827@lukather> (raw)
In-Reply-To: <1422388455-25923-7-git-send-email-wens@csie.org>

On Wed, Jan 28, 2015 at 03:54:11AM +0800, Chen-Yu Tsai wrote:
> The A80 has 3 EHCI/OHCI USB controllers.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun9i-a80.dtsi | 70 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 70 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
> index d7ebd9390b01..9483b15bfda7 100644
> --- a/arch/arm/boot/dts/sun9i-a80.dtsi
> +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
> @@ -355,6 +355,28 @@
>  		 */
>  		ranges = <0 0 0 0x20000000>;
>  
> +		ehci0: usb at 00a00000 {
> +			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
> +			reg = <0x00a00000 0x100>;
> +			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 1>;
> +			resets = <&usb_mod_clk 17>;
> +			phys = <&usbphy1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
> +		ohci0: usb at 00a00400 {
> +			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
> +			reg = <0x00a00400 0x100>;
> +			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 1>, <&usb_mod_clk 2>;
> +			resets = <&usb_mod_clk 17>;
> +			phys = <&usbphy1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
>  		usbphy1: phy at 00a00800 {
>  			compatible = "allwinner,sun9i-a80-usb-phy";
>  			reg = <0x00a00800 0x4>;
> @@ -366,6 +388,32 @@
>  			#phy-cells = <0>;
>  		};
>  
> +		ehci1: usb at 00a01000 {
> +			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
> +			reg = <0x00a01000 0x100>;
> +			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 3>;
> +			resets = <&usb_mod_clk 18>;
> +			phys = <&usbphy2>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
> +		/*
> +		 * Even though ohci1 exists, it is never used as
> +		 * usb1 only has HSIC pins routed externally
> +		 */
> +		ohci1: usb at 00a01400 {
> +			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
> +			reg = <0x00a01400 0x100>;
> +			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 3>, <&usb_mod_clk 4>;
> +			resets = <&usb_mod_clk 18>;
> +			phys = <&usbphy2>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +

Is it worth declaring it then? If it's not never ever going to be used
since no pins are routed outside of the SoC, I don't think it should
be declared in the DTSI.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Mike Turquette
	<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Grant Likely
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v3 06/10] ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi
Date: Sun, 1 Feb 2015 15:17:50 +0100	[thread overview]
Message-ID: <20150201141750.GG4827@lukather> (raw)
In-Reply-To: <1422388455-25923-7-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 2508 bytes --]

On Wed, Jan 28, 2015 at 03:54:11AM +0800, Chen-Yu Tsai wrote:
> The A80 has 3 EHCI/OHCI USB controllers.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> ---
>  arch/arm/boot/dts/sun9i-a80.dtsi | 70 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 70 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
> index d7ebd9390b01..9483b15bfda7 100644
> --- a/arch/arm/boot/dts/sun9i-a80.dtsi
> +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
> @@ -355,6 +355,28 @@
>  		 */
>  		ranges = <0 0 0 0x20000000>;
>  
> +		ehci0: usb@00a00000 {
> +			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
> +			reg = <0x00a00000 0x100>;
> +			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 1>;
> +			resets = <&usb_mod_clk 17>;
> +			phys = <&usbphy1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
> +		ohci0: usb@00a00400 {
> +			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
> +			reg = <0x00a00400 0x100>;
> +			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 1>, <&usb_mod_clk 2>;
> +			resets = <&usb_mod_clk 17>;
> +			phys = <&usbphy1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
>  		usbphy1: phy@00a00800 {
>  			compatible = "allwinner,sun9i-a80-usb-phy";
>  			reg = <0x00a00800 0x4>;
> @@ -366,6 +388,32 @@
>  			#phy-cells = <0>;
>  		};
>  
> +		ehci1: usb@00a01000 {
> +			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
> +			reg = <0x00a01000 0x100>;
> +			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 3>;
> +			resets = <&usb_mod_clk 18>;
> +			phys = <&usbphy2>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
> +		/*
> +		 * Even though ohci1 exists, it is never used as
> +		 * usb1 only has HSIC pins routed externally
> +		 */
> +		ohci1: usb@00a01400 {
> +			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
> +			reg = <0x00a01400 0x100>;
> +			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 3>, <&usb_mod_clk 4>;
> +			resets = <&usb_mod_clk 18>;
> +			phys = <&usbphy2>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +

Is it worth declaring it then? If it's not never ever going to be used
since no pins are routed outside of the SoC, I don't think it should
be declared in the DTSI.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Mike Turquette <mturquette@linaro.org>,
	Emilio Lopez <emilio@elopez.com.ar>,
	Rob Herring <robh+dt@kernel.org>,
	Grant Likely <grant.likely@linaro.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v3 06/10] ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi
Date: Sun, 1 Feb 2015 15:17:50 +0100	[thread overview]
Message-ID: <20150201141750.GG4827@lukather> (raw)
In-Reply-To: <1422388455-25923-7-git-send-email-wens@csie.org>

[-- Attachment #1: Type: text/plain, Size: 2571 bytes --]

On Wed, Jan 28, 2015 at 03:54:11AM +0800, Chen-Yu Tsai wrote:
> The A80 has 3 EHCI/OHCI USB controllers.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun9i-a80.dtsi | 70 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 70 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
> index d7ebd9390b01..9483b15bfda7 100644
> --- a/arch/arm/boot/dts/sun9i-a80.dtsi
> +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
> @@ -355,6 +355,28 @@
>  		 */
>  		ranges = <0 0 0 0x20000000>;
>  
> +		ehci0: usb@00a00000 {
> +			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
> +			reg = <0x00a00000 0x100>;
> +			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 1>;
> +			resets = <&usb_mod_clk 17>;
> +			phys = <&usbphy1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
> +		ohci0: usb@00a00400 {
> +			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
> +			reg = <0x00a00400 0x100>;
> +			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 1>, <&usb_mod_clk 2>;
> +			resets = <&usb_mod_clk 17>;
> +			phys = <&usbphy1>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
>  		usbphy1: phy@00a00800 {
>  			compatible = "allwinner,sun9i-a80-usb-phy";
>  			reg = <0x00a00800 0x4>;
> @@ -366,6 +388,32 @@
>  			#phy-cells = <0>;
>  		};
>  
> +		ehci1: usb@00a01000 {
> +			compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
> +			reg = <0x00a01000 0x100>;
> +			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 3>;
> +			resets = <&usb_mod_clk 18>;
> +			phys = <&usbphy2>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +
> +		/*
> +		 * Even though ohci1 exists, it is never used as
> +		 * usb1 only has HSIC pins routed externally
> +		 */
> +		ohci1: usb@00a01400 {
> +			compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
> +			reg = <0x00a01400 0x100>;
> +			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&usb_mod_clk 3>, <&usb_mod_clk 4>;
> +			resets = <&usb_mod_clk 18>;
> +			phys = <&usbphy2>;
> +			phy-names = "usb";
> +			status = "disabled";
> +		};
> +

Is it worth declaring it then? If it's not never ever going to be used
since no pins are routed outside of the SoC, I don't think it should
be declared in the DTSI.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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  reply	other threads:[~2015-02-01 14:17 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-27 19:54 [PATCH v3 00/10] ARM: sun9i: Add USB host controller support for A80 Chen-Yu Tsai
2015-01-27 19:54 ` Chen-Yu Tsai
2015-01-27 19:54 ` Chen-Yu Tsai
2015-01-27 19:54 ` [PATCH v3 01/10] clk: sunxi: Move USB clocks to separate file Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 13:53   ` Maxime Ripard
2015-02-01 13:53     ` Maxime Ripard
2015-02-01 13:53     ` Maxime Ripard
2015-01-27 19:54 ` [PATCH v3 02/10] clk: sunxi: Add support for sun9i A80 USB clocks and resets Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 13:55   ` Maxime Ripard
2015-02-01 13:55     ` Maxime Ripard
2015-02-01 13:55     ` Maxime Ripard
2015-01-27 19:54 ` [PATCH v3 03/10] ARM: dts: sun9i: Add usb clock nodes to a80 dtsi Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 13:56   ` Maxime Ripard
2015-02-01 13:56     ` Maxime Ripard
2015-02-01 13:56     ` Maxime Ripard
2015-01-27 19:54 ` [PATCH v3 04/10] phy: Add driver to support individual USB PHYs on sun9i Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 14:15   ` Maxime Ripard
2015-02-01 14:15     ` Maxime Ripard
2015-02-01 14:15     ` Maxime Ripard
2015-01-27 19:54 ` [PATCH v3 05/10] ARM: dts: sun9i: Add usb phy nodes to a80 dtsi Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 14:16   ` Maxime Ripard
2015-02-01 14:16     ` Maxime Ripard
2015-02-01 14:16     ` Maxime Ripard
2015-01-27 19:54 ` [PATCH v3 06/10] ARM: dts: sun9i: Add USB host controller " Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 14:17   ` Maxime Ripard [this message]
2015-02-01 14:17     ` Maxime Ripard
2015-02-01 14:17     ` Maxime Ripard
2015-02-01 14:31     ` Chen-Yu Tsai
2015-02-01 14:31       ` Chen-Yu Tsai
2015-02-01 14:31       ` Chen-Yu Tsai
2015-01-27 19:54 ` [PATCH v3 07/10] ARM: dts: sunxi: Add usb3_vbus regulator to common regulators dtsi Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-02-01 14:20   ` Maxime Ripard
2015-02-01 14:20     ` Maxime Ripard
2015-02-01 14:20     ` Maxime Ripard
2015-02-01 14:28     ` Chen-Yu Tsai
2015-02-01 14:28       ` Chen-Yu Tsai
2015-02-01 14:28       ` Chen-Yu Tsai
2015-01-27 19:54 ` [PATCH v3 08/10] ARM: dts: sun9i: Enable USB support on A80 Optimus board Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54 ` [PATCH v3 09/10] ARM: sunxi_defconfig: Enable CONFIG_PHY_SUN9I_USB Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54 ` [PATCH v3 10/10] ARM: multi_v7_defconfig: " Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai
2015-01-27 19:54   ` Chen-Yu Tsai

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