From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: sun8i: Add SMP support for the Allwinner A23
Date: Wed, 18 Mar 2015 11:29:39 +0100 [thread overview]
Message-ID: <20150318102939.GP4638@lukather> (raw)
In-Reply-To: <1426649042-30547-3-git-send-email-wens@csie.org>
On Wed, Mar 18, 2015 at 11:24:01AM +0800, Chen-Yu Tsai wrote:
> The A23 is a dual Cortex-A7. Add the logic to use the IPs used to
> control the CPU configuration and the CPU power so that we can
> bring up secondary CPUs at boot.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>
> We can't use of_io_request_and_map() here, as it will conflict
> with PRCM, and leave us without a serial console.
>
> I think a proper way to solve this would be a syscon device or
> something like the mfd-simple device posted by Arnd.
>
> ---
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> arch/arm/mach-sunxi/platsmp.c | 69 ++++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index 8b9e0a95de31..40202d85b132 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -188,6 +188,7 @@ nodes to be present and contain the properties described below.
> # On ARM 32-bit systems this property is optional and
> can be one of:
> "allwinner,sun6i-a31"
> + "allwinner,sun8i-a23"
> "arm,psci"
> "brcm,brahma-b15"
> "marvell,armada-375-smp"
> diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
> index 587b0468efcc..e8483ec79d67 100644
> --- a/arch/arm/mach-sunxi/platsmp.c
> +++ b/arch/arm/mach-sunxi/platsmp.c
> @@ -121,3 +121,72 @@ static struct smp_operations sun6i_smp_ops __initdata = {
> .smp_boot_secondary = sun6i_smp_boot_secondary,
> };
> CPU_METHOD_OF_DECLARE(sun6i_a31_smp, "allwinner,sun6i-a31", &sun6i_smp_ops);
> +
> +static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)
> +{
> + struct device_node *node;
> +
> + node = of_find_compatible_node(NULL, NULL, "allwinner,sun8i-a23-prcm");
> + if (!node) {
> + pr_err("Missing A23 PRCM node in the device tree\n");
> + return;
> + }
> +
> + prcm_membase = of_iomap(node, 0);
> + if (!prcm_membase) {
> + pr_err("Couldn't map A23 PRCM registers\n");
> + return;
> + }
> +
> + node = of_find_compatible_node(NULL, NULL,
> + "allwinner,sun8i-a23-cpuconfig");
> + if (!node) {
> + pr_err("Missing A23 CPU config node in the device tree\n");
> + return;
> + }
> +
> + cpucfg_membase = of_iomap(node, 0);
> + if (!cpucfg_membase)
> + pr_err("Couldn't map A23 CPU config registers\n");
> +
> +}
> +
> +static int sun8i_smp_boot_secondary(unsigned int cpu,
> + struct task_struct *idle)
> +{
> + u32 reg;
> +
> + if (!(prcm_membase && cpucfg_membase))
> + return -EFAULT;
> +
> + spin_lock(&cpu_lock);
> +
> + /* Set CPU boot address */
> + writel(virt_to_phys(secondary_startup),
> + cpucfg_membase + CPUCFG_PRIVATE0_REG);
One question I couldn't find any answer to is that does the SMP bit is
set in secondary_startup?
I couldn't find where it was set, but it still looks like the right
thing to do, so I would expect the code to do that.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
Marc Zyngier <marc.zyngier@arm.com>
Subject: Re: [PATCH 2/3] ARM: sun8i: Add SMP support for the Allwinner A23
Date: Wed, 18 Mar 2015 11:29:39 +0100 [thread overview]
Message-ID: <20150318102939.GP4638@lukather> (raw)
In-Reply-To: <1426649042-30547-3-git-send-email-wens@csie.org>
[-- Attachment #1: Type: text/plain, Size: 3244 bytes --]
On Wed, Mar 18, 2015 at 11:24:01AM +0800, Chen-Yu Tsai wrote:
> The A23 is a dual Cortex-A7. Add the logic to use the IPs used to
> control the CPU configuration and the CPU power so that we can
> bring up secondary CPUs at boot.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>
> We can't use of_io_request_and_map() here, as it will conflict
> with PRCM, and leave us without a serial console.
>
> I think a proper way to solve this would be a syscon device or
> something like the mfd-simple device posted by Arnd.
>
> ---
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> arch/arm/mach-sunxi/platsmp.c | 69 ++++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index 8b9e0a95de31..40202d85b132 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -188,6 +188,7 @@ nodes to be present and contain the properties described below.
> # On ARM 32-bit systems this property is optional and
> can be one of:
> "allwinner,sun6i-a31"
> + "allwinner,sun8i-a23"
> "arm,psci"
> "brcm,brahma-b15"
> "marvell,armada-375-smp"
> diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
> index 587b0468efcc..e8483ec79d67 100644
> --- a/arch/arm/mach-sunxi/platsmp.c
> +++ b/arch/arm/mach-sunxi/platsmp.c
> @@ -121,3 +121,72 @@ static struct smp_operations sun6i_smp_ops __initdata = {
> .smp_boot_secondary = sun6i_smp_boot_secondary,
> };
> CPU_METHOD_OF_DECLARE(sun6i_a31_smp, "allwinner,sun6i-a31", &sun6i_smp_ops);
> +
> +static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)
> +{
> + struct device_node *node;
> +
> + node = of_find_compatible_node(NULL, NULL, "allwinner,sun8i-a23-prcm");
> + if (!node) {
> + pr_err("Missing A23 PRCM node in the device tree\n");
> + return;
> + }
> +
> + prcm_membase = of_iomap(node, 0);
> + if (!prcm_membase) {
> + pr_err("Couldn't map A23 PRCM registers\n");
> + return;
> + }
> +
> + node = of_find_compatible_node(NULL, NULL,
> + "allwinner,sun8i-a23-cpuconfig");
> + if (!node) {
> + pr_err("Missing A23 CPU config node in the device tree\n");
> + return;
> + }
> +
> + cpucfg_membase = of_iomap(node, 0);
> + if (!cpucfg_membase)
> + pr_err("Couldn't map A23 CPU config registers\n");
> +
> +}
> +
> +static int sun8i_smp_boot_secondary(unsigned int cpu,
> + struct task_struct *idle)
> +{
> + u32 reg;
> +
> + if (!(prcm_membase && cpucfg_membase))
> + return -EFAULT;
> +
> + spin_lock(&cpu_lock);
> +
> + /* Set CPU boot address */
> + writel(virt_to_phys(secondary_startup),
> + cpucfg_membase + CPUCFG_PRIVATE0_REG);
One question I couldn't find any answer to is that does the SMP bit is
set in secondary_startup?
I couldn't find where it was set, but it still looks like the right
thing to do, so I would expect the code to do that.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2015-03-18 10:29 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-18 3:23 [PATCH 0/3] ARM: sun8i: Add SMP and arch-timer support for A23 Chen-Yu Tsai
2015-03-18 3:23 ` Chen-Yu Tsai
2015-03-18 3:24 ` [PATCH 1/3] ARM: dts: sun8i: Enable ARM architected timer on A23 Chen-Yu Tsai
2015-03-18 3:24 ` Chen-Yu Tsai
2015-03-18 10:21 ` Maxime Ripard
2015-03-18 10:21 ` Maxime Ripard
2015-03-18 3:24 ` [PATCH 2/3] ARM: sun8i: Add SMP support for the Allwinner A23 Chen-Yu Tsai
2015-03-18 3:24 ` Chen-Yu Tsai
2015-03-18 10:29 ` Maxime Ripard [this message]
2015-03-18 10:29 ` Maxime Ripard
2015-03-19 2:07 ` Chen-Yu Tsai
2015-03-19 2:07 ` Chen-Yu Tsai
[not found] ` <2015031912050362587032@gmail.com>
2015-03-19 9:18 ` [linux-sunxi] " maxime.ripard
2015-03-19 9:18 ` maxime.ripard
2015-03-25 23:39 ` Chen-Yu Tsai
2015-03-25 23:39 ` Chen-Yu Tsai
2015-03-30 22:10 ` maxime.ripard
2015-03-30 22:10 ` maxime.ripard
2015-03-18 3:24 ` [PATCH 3/3] ARM: sun8i: dt: Enable A23 SMP support Chen-Yu Tsai
2015-03-18 3:24 ` Chen-Yu Tsai
2015-03-30 22:12 ` [PATCH 0/3] ARM: sun8i: Add SMP and arch-timer support for A23 Maxime Ripard
2015-03-30 22:12 ` Maxime Ripard
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