From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: list self-refresh as enabled on newer platforms
Date: Thu, 2 Apr 2015 21:42:49 +0300 [thread overview]
Message-ID: <20150402184249.GE17410@intel.com> (raw)
In-Reply-To: <1427998729-30794-1-git-send-email-jbarnes@virtuousgeek.org>
On Thu, Apr 02, 2015 at 11:18:49AM -0700, Jesse Barnes wrote:
> I guess this is a lie for 8xx, but newer stuff takes care of this for
> us.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 91c945b..a8f42a7 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1686,6 +1686,8 @@ static int i915_sr_status(struct seq_file *m, void *unused)
> sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
> else if (IS_PINEVIEW(dev))
> sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
> + else
> + sr_enabled = true; /* other platforms don't need enabling */
Not true actually.
The line between maxfifo and SR is a blurry one. We treat them as the
same thing. So I think this should just read out whatever registers
we set up in intel_set_memory_cxsr().
On ILK+ it should actually check if LP1+ watermarks are enabled or not.
And I can't recall enough details on SKL right now to have an idea what
should be done there.
That's all assuming we want this file to be at least somewhat useful.
I think the other good option is to just remove the file entirely and
depend on the new intel_watermark tool I wrote recently.
>
> intel_runtime_pm_put(dev_priv);
>
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-04-02 18:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-02 18:18 [PATCH] drm/i915: list self-refresh as enabled on newer platforms Jesse Barnes
2015-04-02 18:42 ` Ville Syrjälä [this message]
2015-04-02 18:48 ` Jesse Barnes
2015-05-27 7:05 ` [PATCH] drm/i915: Include VLV in self refresh status Ander Conselvan de Oliveira
2015-06-02 11:17 ` [PATCH] drm/i915: Include G4X/VLV/CHV " Ander Conselvan de Oliveira
2015-06-02 11:51 ` Ville Syrjälä
2015-06-02 11:58 ` Jani Nikula
2015-06-04 8:23 ` Jani Nikula
2015-06-02 17:46 ` shuang.he
2015-04-03 5:21 ` [PATCH] drm/i915: list self-refresh as enabled on newer platforms shuang.he
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150402184249.GE17410@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jbarnes@virtuousgeek.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.