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From: Chao Peng <chao.p.peng@linux.intel.com>
To: Ian Campbell <ian.campbell@citrix.com>
Cc: keir@xen.org, stefano.stabellini@eu.citrix.com,
	andrew.cooper3@citrix.com, Ian.Jackson@eu.citrix.com,
	xen-devel@lists.xen.org, will.auld@intel.com, JBeulich@suse.com,
	wei.liu2@citrix.com, dgdegra@tycho.nsa.gov
Subject: Re: [PATCH v4 12/12] docs: add xl-psr.markdown
Date: Fri, 17 Apr 2015 22:39:54 +0800	[thread overview]
Message-ID: <20150417143953.GA4049@pengc-linux.bj.intel.com> (raw)
In-Reply-To: <1429185496.25195.117.camel@citrix.com>

On Thu, Apr 16, 2015 at 12:58:16PM +0100, Ian Campbell wrote:
> On Thu, 2015-04-09 at 17:18 +0800, Chao Peng wrote:
> 
> BTW, do you know if someone is planning to work on libvirt integration
> for this stuff?

As I know, there are people from Intel will take care of this.

> (Aside: "cache-occupancy" would be more in keeping with the interfaces,
> oh well, you can fix if you feel like it, or not bother if you like).

It's fixed in v5.

> > +
> > +Detailed information please refer to Intel SDM chapter 17.15.
> 
> Perhaps a few simple examples, would make the basics clearer without
> having to hit the SDM for the full gory detail e.g.
> 
>         For example, assuming a system with 8 portions and 3 domains:
>         
>         A CBM of 0xff for every domain means each domain can access the
>         whole cache. This is the default.
>         
>         Giving one domain a CBM of 0x0F and the other two domain's 0xF0
>         means that the first domain gets exclusive access to half of the
>         cache (half of the portions) and the other two will share the
>         other half.
>         
>         Giving one domain a CBM of 0x0F, one 0x30 and the last 0xc0
>         would give the first domain exclusive access to half the cache,
>         and the other two exclusive access to one quarter each.
>         
> Then have the reference the SDM for more detailed stuff.

Thank you, for typing so much ...

Chao

  reply	other threads:[~2015-04-17 14:39 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-09  9:18 [PATCH v4 00/12] enable Cache Allocation Technology (CAT) for VMs Chao Peng
2015-04-09  9:18 ` [PATCH v4 01/12] x86: clean up psr boot parameter parsing Chao Peng
2015-04-09 20:38   ` Andrew Cooper
2015-04-09  9:18 ` [PATCH v4 02/12] x86: improve psr scheduling code Chao Peng
2015-04-09 21:01   ` Andrew Cooper
2015-04-10  7:24     ` Chao Peng
2015-04-10  9:28       ` Andrew Cooper
2015-04-09  9:18 ` [PATCH v4 03/12] x86: detect and initialize Intel CAT feature Chao Peng
2015-04-09 21:30   ` Andrew Cooper
2015-04-09  9:18 ` [PATCH v4 04/12] x86: maintain COS to CBM mapping for each socket Chao Peng
2015-04-09 21:35   ` Andrew Cooper
2015-04-10  7:26     ` Chao Peng
2015-04-09  9:18 ` [PATCH v4 05/12] x86: maintain socket CPU mask for CAT Chao Peng
2015-04-09 21:45   ` Andrew Cooper
2015-04-10  7:33     ` Chao Peng
2015-04-10  9:48       ` Andrew Cooper
2015-04-09  9:18 ` [PATCH v4 06/12] x86: add COS information for each domain Chao Peng
2015-04-09 21:54   ` Andrew Cooper
2015-04-10  7:35     ` Chao Peng
2015-04-09  9:18 ` [PATCH v4 07/12] x86: expose CBM length and COS number information Chao Peng
2015-04-09 21:54   ` Andrew Cooper
2015-04-09  9:18 ` [PATCH v4 08/12] x86: dynamically get/set CBM for a domain Chao Peng
2015-04-09 22:06   ` Andrew Cooper
2015-04-10  7:37     ` Chao Peng
2015-04-09  9:18 ` [PATCH v4 09/12] x86: add scheduling support for Intel CAT Chao Peng
2015-04-09 22:12   ` Andrew Cooper
2015-04-10  7:41     ` Chao Peng
2015-04-09  9:18 ` [PATCH v4 10/12] xsm: add CAT related xsm policies Chao Peng
2015-04-09  9:18 ` [PATCH v4 11/12] tools: add tools support for Intel CAT Chao Peng
2015-04-09 10:50   ` Wei Liu
2015-04-16 11:20   ` Ian Campbell
2015-04-09  9:18 ` [PATCH v4 12/12] docs: add xl-psr.markdown Chao Peng
2015-04-09 11:29   ` Andrew Cooper
2015-04-10  7:45     ` Chao Peng
2015-04-16 11:58   ` Ian Campbell
2015-04-17 14:39     ` Chao Peng [this message]
2015-04-09 22:15 ` [PATCH v4 00/12] enable Cache Allocation Technology (CAT) for VMs Andrew Cooper

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