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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Julien Grall <julien.grall@citrix.com>
Cc: edgar.iglesias@xilinx.com, stefano.stabellini@citrix.com,
	tim@xen.org, ian.campbell@citrix.com, xen-devel@lists.xen.org
Subject: Re: [PATCH v2 2/3] xen/arm: Add p2m_pfn_bits
Date: Thu, 30 Apr 2015 21:48:29 +1000	[thread overview]
Message-ID: <20150430114829.GA4702@toto> (raw)
In-Reply-To: <5541F847.7070204@citrix.com>

On Thu, Apr 30, 2015 at 10:39:19AM +0100, Julien Grall wrote:
> Hi Edgar,
> 
> On 30/04/2015 07:06, Edgar E. Iglesias wrote:
> >      val |= VTCR_T0SZ(0x18); /* 40 bit IPA */
> >      val |= VTCR_SL0(0x1); /* P2M starts at first level */
> >  #else /* CONFIG_ARM_64 */
> >@@ -1557,6 +1561,7 @@ void __init setup_virt_paging(void)
> >
> >      p2m_root_order = pa_range_info[pa_range].root_order;
> >      p2m_root_level = 2 - pa_range_info[pa_range].sl0;
> >+    p2m_pfn_bits = 64 - pa_range_info[pa_range].t0sz;
> 
> You are mixing IPA (Intermediate Physical Address) and PFN (Page
> Frame Number) which have to 2 distinct meaning.
> 
> In this case, we are dealing with IPA. Please rename the variable to
> p2m_ipa_bits and replace PFN by IPA in all the patch.


Oops, yes I'll fix that up and send a new version.

Thanks,
Edgar

  reply	other threads:[~2015-04-30 11:48 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-30  6:06 [PATCH v2 0/3] Set SMMU s2 input-size based on p2m tables Edgar E. Iglesias
2015-04-30  6:06 ` [PATCH v2 1/3] xen/arm: Re-order iommu_setup to after setup_virt_paging Edgar E. Iglesias
2015-04-30  9:27   ` Julien Grall
2015-04-30  6:06 ` [PATCH v2 2/3] xen/arm: Add p2m_pfn_bits Edgar E. Iglesias
2015-04-30  9:39   ` Julien Grall
2015-04-30 11:48     ` Edgar E. Iglesias [this message]
2015-04-30  6:06 ` [PATCH v2 3/3] xen/iommu: arm: Use p2m_pfn_bits as stage2 input size Edgar E. Iglesias

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