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From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>,
	bhelgaas@google.com, linuxppc-dev@lists.ozlabs.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH V3 8/9] powerpc/powernv: Support PCI config restore for VFs
Date: Tue, 12 May 2015 16:16:45 +0800	[thread overview]
Message-ID: <20150512081645.GD16788@richard> (raw)
In-Reply-To: <20150512063403.GA21256@gwshan>

On Tue, May 12, 2015 at 04:34:03PM +1000, Gavin Shan wrote:
>>
>>>>+	/* Disable Completion Timeout */
>>>>+	if (pcie_cap) {
>>>>+		pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCAP2, 4, &cap2);
>>>>+		if (cap2 & 0x10) {
>>>>+			pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL2, 4, &cap2);
>>>>+			cap2 |= 0x10;
>>>>+			pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL2, 4, cap2);
>>>>+		}
>>>>+	}
>>>>+
>>>>+	/* Enable SERR and parity checking */
>>>>+	pnv_pci_cfg_read(pdn, PCI_COMMAND, 2, &cmd);
>>>>+	cmd |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
>>>>+	pnv_pci_cfg_write(pdn, PCI_COMMAND, 2, cmd);
>>>>+
>>>>+	/* Enable report various errors */
>>>>+	if (pcie_cap) {
>>>>+		pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, &devctl);
>>>>+		devctl &= ~PCI_EXP_DEVCTL_CERE;
>>>>+		devctl |= (PCI_EXP_DEVCTL_NFERE |
>>>>+			   PCI_EXP_DEVCTL_FERE |
>>>>+			   PCI_EXP_DEVCTL_URRE);
>>>>+		pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, devctl);
>>>>+	}
>>>>+
>>>>+	/* Enable ECRC generation and check */
>>>>+	if (pcie_cap) {
>>>>+		aer_cap = pnv_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
>>>>+		pnv_pci_cfg_read(pdn, aer_cap + PCI_ERR_CAP, 4, &aer_capctl);
>>>>+		aer_capctl |= (PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
>>>>+		pnv_pci_cfg_write(pdn, aer_cap + PCI_ERR_CAP, 4, aer_capctl);
>>>>+	}
>>>>+
>>>>+	return 0;
>>>>+}
>>>>+#endif /* CONFIG_PCI_IOV */
>>>>+
>>>
>>>The code is copied over from skiboot firmware. I still dislike the fact that
>>>we have to maintain two sets of similar functions in skiboot/kernel. I still
>>>believe the way I suggested can help: the firmware exports the error routing
>>>rules and kernel has support it based on the rules. With it, the skiboot is
>>>the source of the information to avoid mismatching between kernel/firmware.
>>
>>Yes, it looks we have duplicate code in kernel and skiboot.
>>
>>As you suggest, if we export some bit map from device node, we still have the
>>real logic in kernel, until we remove that part in skiboot.
>>
>>By removing that part in skiboot, we may have some compatibility problem. For
>>example, an old kernel may not run on the new version of skiboot.
>>
>
>It's fine to keep two set code which bear with same rule, which is exported
>from skiboot. In that case, the rule is the only thing we have to care. We
>don't need care the code any more to avoid mismatch between kernel/firmware.
>

Ok, duplication is reasonable, then the major point for this is we need to
have a clear rule for restoring configuration for a device.

Than I suggest we could have another patch set to handle this. Define the rule
clearly and restore the configuration in kernel when skiboot firmware export
such rules.

-- 
Richard Yang
Help you, Help me


WARNING: multiple messages have this Message-ID (diff)
From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
	Wei Yang <weiyang@linux.vnet.ibm.com>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH V3 8/9] powerpc/powernv: Support PCI config restore for VFs
Date: Tue, 12 May 2015 16:16:45 +0800	[thread overview]
Message-ID: <20150512081645.GD16788@richard> (raw)
In-Reply-To: <20150512063403.GA21256@gwshan>

On Tue, May 12, 2015 at 04:34:03PM +1000, Gavin Shan wrote:
>>
>>>>+	/* Disable Completion Timeout */
>>>>+	if (pcie_cap) {
>>>>+		pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCAP2, 4, &cap2);
>>>>+		if (cap2 & 0x10) {
>>>>+			pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL2, 4, &cap2);
>>>>+			cap2 |= 0x10;
>>>>+			pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL2, 4, cap2);
>>>>+		}
>>>>+	}
>>>>+
>>>>+	/* Enable SERR and parity checking */
>>>>+	pnv_pci_cfg_read(pdn, PCI_COMMAND, 2, &cmd);
>>>>+	cmd |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
>>>>+	pnv_pci_cfg_write(pdn, PCI_COMMAND, 2, cmd);
>>>>+
>>>>+	/* Enable report various errors */
>>>>+	if (pcie_cap) {
>>>>+		pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, &devctl);
>>>>+		devctl &= ~PCI_EXP_DEVCTL_CERE;
>>>>+		devctl |= (PCI_EXP_DEVCTL_NFERE |
>>>>+			   PCI_EXP_DEVCTL_FERE |
>>>>+			   PCI_EXP_DEVCTL_URRE);
>>>>+		pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, devctl);
>>>>+	}
>>>>+
>>>>+	/* Enable ECRC generation and check */
>>>>+	if (pcie_cap) {
>>>>+		aer_cap = pnv_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
>>>>+		pnv_pci_cfg_read(pdn, aer_cap + PCI_ERR_CAP, 4, &aer_capctl);
>>>>+		aer_capctl |= (PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
>>>>+		pnv_pci_cfg_write(pdn, aer_cap + PCI_ERR_CAP, 4, aer_capctl);
>>>>+	}
>>>>+
>>>>+	return 0;
>>>>+}
>>>>+#endif /* CONFIG_PCI_IOV */
>>>>+
>>>
>>>The code is copied over from skiboot firmware. I still dislike the fact that
>>>we have to maintain two sets of similar functions in skiboot/kernel. I still
>>>believe the way I suggested can help: the firmware exports the error routing
>>>rules and kernel has support it based on the rules. With it, the skiboot is
>>>the source of the information to avoid mismatching between kernel/firmware.
>>
>>Yes, it looks we have duplicate code in kernel and skiboot.
>>
>>As you suggest, if we export some bit map from device node, we still have the
>>real logic in kernel, until we remove that part in skiboot.
>>
>>By removing that part in skiboot, we may have some compatibility problem. For
>>example, an old kernel may not run on the new version of skiboot.
>>
>
>It's fine to keep two set code which bear with same rule, which is exported
>from skiboot. In that case, the rule is the only thing we have to care. We
>don't need care the code any more to avoid mismatch between kernel/firmware.
>

Ok, duplication is reasonable, then the major point for this is we need to
have a clear rule for restoring configuration for a device.

Than I suggest we could have another patch set to handle this. Define the rule
clearly and restore the configuration in kernel when skiboot firmware export
such rules.

-- 
Richard Yang
Help you, Help me

  reply	other threads:[~2015-05-12  8:17 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-04  7:07 [PATCH V3 0/9] VF EEH on Power8 Wei Yang
2015-05-04  7:07 ` Wei Yang
2015-05-04  7:07 ` [PATCH V3 1/9] pci/iov: rename and export virtfn_add/virtfn_remove Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-11  2:13   ` Gavin Shan
2015-05-11  2:13     ` Gavin Shan
2015-05-04  7:07 ` [PATCH V3 2/9] powerpc/pci_dn: cache vf_index in pci_dn Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-11  2:21   ` Gavin Shan
2015-05-11  2:21     ` Gavin Shan
2015-05-11  5:54     ` Wei Yang
2015-05-11  5:54       ` Wei Yang
2015-05-12  6:15       ` Gavin Shan
2015-05-12  6:15         ` Gavin Shan
2015-05-12  7:29         ` Wei Yang
2015-05-12  7:29           ` Wei Yang
2015-05-04  7:07 ` [PATCH V3 3/9] powerpc/pci: remove PCI devices in reverse order Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-04  7:07 ` [PATCH V3 4/9] powerpc/eeh: cache address range just for normal device Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-04  7:07 ` [PATCH V3 5/9] powerpc/eeh: create EEH_PE_VF for VF PE Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-11  2:37   ` Gavin Shan
2015-05-11  2:37     ` Gavin Shan
2015-05-11  6:25     ` Wei Yang
2015-05-11  6:25       ` Wei Yang
2015-05-12  6:28       ` Gavin Shan
2015-05-12  6:28         ` Gavin Shan
2015-05-12  7:52         ` Wei Yang
2015-05-12  7:52           ` Wei Yang
2015-05-04  7:07 ` [PATCH V3 6/9] powerpc/powernv: create/release eeh_dev for VF Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-11  2:48   ` Gavin Shan
2015-05-11  2:48     ` Gavin Shan
2015-05-12  8:06     ` Wei Yang
2015-05-12  8:06       ` Wei Yang
2015-05-12 23:09       ` Gavin Shan
2015-05-12 23:09         ` Gavin Shan
2015-05-04  7:07 ` [PATCH V3 7/9] powerpc/powernv: Support EEH reset for VFs Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-11  3:03   ` Gavin Shan
2015-05-11  3:03     ` Gavin Shan
2015-05-04  7:07 ` [PATCH V3 8/9] powerpc/powernv: Support PCI config restore " Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-11  4:22   ` Gavin Shan
2015-05-11  4:22     ` Gavin Shan
2015-05-12  1:31     ` Wei Yang
2015-05-12  1:31       ` Wei Yang
2015-05-12  6:34       ` Gavin Shan
2015-05-12  6:34         ` Gavin Shan
2015-05-12  8:16         ` Wei Yang [this message]
2015-05-12  8:16           ` Wei Yang
2015-05-12 23:16           ` Gavin Shan
2015-05-12 23:16             ` Gavin Shan
2015-05-04  7:07 ` [PATCH V3 9/9] powerpc/eeh: handle VF PE properly Wei Yang
2015-05-04  7:07   ` Wei Yang
2015-05-13  1:16   ` Gavin Shan
2015-05-13  1:16     ` Gavin Shan
2015-05-14  9:35     ` Wei Yang
2015-05-14  9:35       ` Wei Yang
2015-05-14 12:15       ` Gavin Shan
2015-05-14 12:15         ` Gavin Shan
2015-05-14 10:02     ` Wei Yang
2015-05-14 10:02       ` Wei Yang
2015-05-14 12:30       ` Gavin Shan
2015-05-14 12:30         ` Gavin Shan

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