From: Andrew Lunn <andrew@lunn.ch>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Vinod Koul <vinod.koul@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Gregory Clement <gregory.clement@free-electrons.com>,
Jason Cooper <jason@lakedaemon.net>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
Lior Amsalem <alior@marvell.com>,
Thomas Petazzoni <thomas@free-electrons.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 8/8] ARM: mvebu: a38x: Enable A38x XOR engine features
Date: Tue, 12 May 2015 18:13:14 +0200 [thread overview]
Message-ID: <20150512161314.GL19927@lunn.ch> (raw)
In-Reply-To: <1431445063-20226-9-git-send-email-maxime.ripard@free-electrons.com>
On Tue, May 12, 2015 at 05:37:43PM +0200, Maxime Ripard wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> The new XOR engine has a new compatible of its own, together with new
> channel capabilities.
>
> Use that new compatible now that we have a driver that can handle it.
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Reviewed-by: Ofer Heifetz <oferh@marvell.com>
> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
> Tested-by: Nadav Haklai <nadavh@marvell.com>
> ---
> arch/arm/boot/dts/armada-38x.dtsi | 20 ++++++--------------
> 1 file changed, 6 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
> index ed2dd8ba4080..6d07b7389415 100644
> --- a/arch/arm/boot/dts/armada-38x.dtsi
> +++ b/arch/arm/boot/dts/armada-38x.dtsi
> @@ -448,7 +448,7 @@
> };
>
> xor@60800 {
> - compatible = "marvell,orion-xor";
> + compatible = "marvell,a38x-xor";
> reg = <0x60800 0x100
> 0x60a00 0x100>;
> clocks = <&gateclk 22>;
> @@ -458,17 +458,13 @@
> interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> dmacap,memcpy;
> dmacap,xor;
> - };
> - xor01 {
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - dmacap,memcpy;
> - dmacap,xor;
> - dmacap,memset;
> + dmacap,pq;
> + dmacap,interrupt;
Does this mean the hardware only has one channel?
And memset is no longer supported?
Andrew
> };
> };
>
> xor@60900 {
> - compatible = "marvell,orion-xor";
> + compatible = "marvell,a38x-xor";
> reg = <0x60900 0x100
> 0x60b00 0x100>;
> clocks = <&gateclk 28>;
> @@ -478,12 +474,8 @@
> interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
> dmacap,memcpy;
> dmacap,xor;
> - };
> - xor11 {
> - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> - dmacap,memcpy;
> - dmacap,xor;
> - dmacap,memset;
> + dmacap,pq;
> + dmacap,interrupt;
> };
> };
>
> --
> 2.4.0
>
WARNING: multiple messages have this Message-ID (diff)
From: andrew@lunn.ch (Andrew Lunn)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 8/8] ARM: mvebu: a38x: Enable A38x XOR engine features
Date: Tue, 12 May 2015 18:13:14 +0200 [thread overview]
Message-ID: <20150512161314.GL19927@lunn.ch> (raw)
In-Reply-To: <1431445063-20226-9-git-send-email-maxime.ripard@free-electrons.com>
On Tue, May 12, 2015 at 05:37:43PM +0200, Maxime Ripard wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> The new XOR engine has a new compatible of its own, together with new
> channel capabilities.
>
> Use that new compatible now that we have a driver that can handle it.
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Reviewed-by: Ofer Heifetz <oferh@marvell.com>
> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
> Tested-by: Nadav Haklai <nadavh@marvell.com>
> ---
> arch/arm/boot/dts/armada-38x.dtsi | 20 ++++++--------------
> 1 file changed, 6 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
> index ed2dd8ba4080..6d07b7389415 100644
> --- a/arch/arm/boot/dts/armada-38x.dtsi
> +++ b/arch/arm/boot/dts/armada-38x.dtsi
> @@ -448,7 +448,7 @@
> };
>
> xor at 60800 {
> - compatible = "marvell,orion-xor";
> + compatible = "marvell,a38x-xor";
> reg = <0x60800 0x100
> 0x60a00 0x100>;
> clocks = <&gateclk 22>;
> @@ -458,17 +458,13 @@
> interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> dmacap,memcpy;
> dmacap,xor;
> - };
> - xor01 {
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - dmacap,memcpy;
> - dmacap,xor;
> - dmacap,memset;
> + dmacap,pq;
> + dmacap,interrupt;
Does this mean the hardware only has one channel?
And memset is no longer supported?
Andrew
> };
> };
>
> xor at 60900 {
> - compatible = "marvell,orion-xor";
> + compatible = "marvell,a38x-xor";
> reg = <0x60900 0x100
> 0x60b00 0x100>;
> clocks = <&gateclk 28>;
> @@ -478,12 +474,8 @@
> interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
> dmacap,memcpy;
> dmacap,xor;
> - };
> - xor11 {
> - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> - dmacap,memcpy;
> - dmacap,xor;
> - dmacap,memset;
> + dmacap,pq;
> + dmacap,interrupt;
> };
> };
>
> --
> 2.4.0
>
next prev parent reply other threads:[~2015-05-12 16:18 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-12 15:37 [PATCH 0/8] ARM: mvebu: Add support for RAID6 PQ offloading Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 1/8] dmaengine: mv_xor: Rename function for consistent naming Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 2/8] dmaengine: mv_xor: add support for a38x command in descriptor mode Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:49 ` Arnd Bergmann
2015-05-12 15:49 ` Arnd Bergmann
2015-05-12 15:54 ` Thomas Petazzoni
2015-05-12 15:54 ` Thomas Petazzoni
2015-05-12 16:03 ` Arnd Bergmann
2015-05-12 16:03 ` Arnd Bergmann
2015-05-13 8:15 ` Maxime Ripard
2015-05-13 8:15 ` Maxime Ripard
2015-05-13 8:46 ` Arnd Bergmann
2015-05-13 8:46 ` Arnd Bergmann
2015-05-12 15:49 ` Thomas Petazzoni
2015-05-12 15:49 ` Thomas Petazzoni
2015-05-12 15:58 ` Andrew Lunn
2015-05-12 15:58 ` Andrew Lunn
2015-05-12 16:05 ` Thomas Petazzoni
2015-05-12 16:05 ` Thomas Petazzoni
2015-05-13 8:23 ` Maxime Ripard
2015-05-13 8:23 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 3/8] dmaengine: mv_xor: Enlarge descriptor pool size Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 4/8] dmaengine: mv_xor: improve descriptors list handling and reduce locking Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 5/8] dmaengine: mv_xor: bug fix for racing condition in descriptors cleanup Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:51 ` Thomas Petazzoni
2015-05-12 15:51 ` Thomas Petazzoni
2015-05-12 15:37 ` [PATCH 6/8] async_tx: adding mult and sum_product flags Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 16:05 ` Andrew Lunn
2015-05-12 16:05 ` Andrew Lunn
2015-05-13 8:45 ` Maxime Ripard
2015-05-13 8:45 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 7/8] dmaengine: mv_xor: add support for a38x RAID6 support Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 8/8] ARM: mvebu: a38x: Enable A38x XOR engine features Maxime Ripard
2015-05-12 15:37 ` Maxime Ripard
2015-05-12 16:13 ` Andrew Lunn [this message]
2015-05-12 16:13 ` Andrew Lunn
2015-05-13 7:16 ` Lior Amsalem
2015-05-13 7:16 ` Lior Amsalem
2015-05-13 8:33 ` Maxime Ripard
2015-05-13 8:33 ` Maxime Ripard
2015-05-12 16:05 ` [PATCH 0/8] ARM: mvebu: Add support for RAID6 PQ offloading Dan Williams
2015-05-12 16:05 ` Dan Williams
2015-05-13 9:17 ` Maxime Ripard
2015-05-13 9:17 ` Maxime Ripard
2015-05-13 16:00 ` Dan Williams
2015-05-13 16:00 ` Dan Williams
2015-05-18 9:14 ` Maxime Ripard
2015-05-18 9:14 ` Maxime Ripard
2015-05-18 17:06 ` Dan Williams
2015-05-18 17:06 ` Dan Williams
2015-05-26 9:45 ` Maxime Ripard
2015-05-26 9:45 ` Maxime Ripard
2015-05-26 9:45 ` Maxime Ripard
2015-05-26 16:31 ` Dan Williams
2015-05-26 16:31 ` Dan Williams
2015-05-27 11:52 ` Boaz Harrosh
2015-05-27 11:52 ` Boaz Harrosh
2015-06-02 14:41 ` Maxime Ripard
2015-06-02 14:41 ` Maxime Ripard
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