From: peterz@infradead.org (Peter Zijlstra)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC] arm: Add for atomic half word exchange
Date: Tue, 19 May 2015 14:43:33 +0200 [thread overview]
Message-ID: <20150519124333.GC3644@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <1795987946.405311432034410830.JavaMail.weblogic@ep2mlwas07a>
On Tue, May 19, 2015 at 11:20:13AM +0000, Sarbojit Ganguly wrote:
> On Tuesday 19 May 2015 09:39:33 Sarbojit Ganguly wrote:
> > Since 16 bit half word exchange was not there and MCS based
> > qspinlock by Waiman's xchg_tail() requires an atomic exchange on a
> > half word, here is a small modification to __xchg() code.
Can you actually see a performance improvement with the qspinlock code
on ARM ?
The real improvements on x86 were on NUMA systems; although there were
real improvements on light loads as well.
Note that ARM (or any load-store arch) could get rid of all the cmpxchg
loops in that code. Although I suppose we replaced the most common ones
with these unconditional atomics already -- like that xchg16 -- so
implementing those with ll/sc, as you did, should be near optimal.
WARNING: multiple messages have this Message-ID (diff)
From: Peter Zijlstra <peterz@infradead.org>
To: Sarbojit Ganguly <ganguly.s@samsung.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"Waiman.Long@hp.com" <Waiman.Long@hp.com>,
"raghavendra.kt@linux.vnet.ibm.com"
<raghavendra.kt@linux.vnet.ibm.com>,
"oleg@redhat.com" <oleg@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
SHARAN ALLUR <sharan.allur@samsung.com>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"vikram.m@samsung.com" <vikram.m@samsung.com>
Subject: Re: [RFC] arm: Add for atomic half word exchange
Date: Tue, 19 May 2015 14:43:33 +0200 [thread overview]
Message-ID: <20150519124333.GC3644@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <1795987946.405311432034410830.JavaMail.weblogic@ep2mlwas07a>
On Tue, May 19, 2015 at 11:20:13AM +0000, Sarbojit Ganguly wrote:
> On Tuesday 19 May 2015 09:39:33 Sarbojit Ganguly wrote:
> > Since 16 bit half word exchange was not there and MCS based
> > qspinlock by Waiman's xchg_tail() requires an atomic exchange on a
> > half word, here is a small modification to __xchg() code.
Can you actually see a performance improvement with the qspinlock code
on ARM ?
The real improvements on x86 were on NUMA systems; although there were
real improvements on light loads as well.
Note that ARM (or any load-store arch) could get rid of all the cmpxchg
loops in that code. Although I suppose we replaced the most common ones
with these unconditional atomics already -- like that xchg16 -- so
implementing those with ll/sc, as you did, should be near optimal.
next prev parent reply other threads:[~2015-05-19 12:43 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 11:20 [RFC] arm: Add for atomic half word exchange Sarbojit Ganguly
2015-05-19 11:20 ` Sarbojit Ganguly
2015-05-19 11:42 ` Arnd Bergmann
2015-05-19 11:42 ` Arnd Bergmann
2015-05-19 12:13 ` Russell King - ARM Linux
2015-05-19 12:13 ` Russell King - ARM Linux
2015-05-19 12:43 ` Peter Zijlstra [this message]
2015-05-19 12:43 ` Peter Zijlstra
-- strict thread matches above, loose matches on Subject: below --
2015-06-05 1:17 Re: " Sarbojit Ganguly
2015-06-05 12:33 ` Arnd Bergmann
2015-06-05 12:33 ` Arnd Bergmann
2015-06-02 6:21 Sarbojit Ganguly
2015-06-02 10:49 ` Arnd Bergmann
2015-06-02 10:49 ` Arnd Bergmann
2015-06-02 5:49 Sarbojit Ganguly
2015-06-02 6:11 ` Raghavendra K T
2015-06-02 6:11 ` Raghavendra K T
2015-05-20 5:09 Sarbojit Ganguly
2015-05-20 6:51 ` Arnd Bergmann
2015-05-20 6:51 ` Arnd Bergmann
2015-05-20 6:57 ` Peter Zijlstra
2015-05-19 9:39 Sarbojit Ganguly
2015-05-19 9:39 ` Sarbojit Ganguly
2015-05-19 9:51 ` Arnd Bergmann
2015-05-19 9:51 ` Arnd Bergmann
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