Re: [PATCH v9 0/3] ARM: mediatek: Add driver for Mediatek I2C

[Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>]

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On Thu, May 21, 2015 at 04:53:27PM +0800, Eddie Huang wrote:
> This series is for Mediatek SoCs I2C controller common bus driver.
> 
> Earlier MTK SoC (for example, MT6589, MT8135) I2C HW has some limitations.
> New generation SoC like MT8173 fix following limitations:
> 
> 1. Only support one i2c_msg number. One exception is WRRD (write then read)
> mode. WRRD can have two i2c_msg numbers.
> 
> 2. Mediatek I2C controller support WRRD(write then read) mode, in WRRD
> mode the Repeat Start will be issued between 2 messages.
> In this driver if 2 messages is first write then read, the driver will
> combine 2 messages using Write-Read mode so the RS will be issued between
> the 2 messages.
> 
> 3. The max transfer data length is 255 in one message. In WRRD mode, the
> max data length of second msg is 31.
> 
> MT8135 and MT6589 can control I2C pins on PMIC(MT6397) by setting the i2c
> registers in MT8135 side. In this case, driver should set OFFSET_PATH_DIR
> bit first, the operation on other registers are still the same.
> For now MT6589/MT8135 support this, MT6577/MT6595/MT8127 do not support.
> For example, If want to use I2C4/5/6 pins on MT8135 just need to enable
> the pinmux, else if want to use I2C pins on PMIC(MT6397) need to add
> "mediatek,have-pmic" property in the .dts file of each platform.
> 
> This driver is based on 4.1-rc1.

Applied to for-next, thanks! Especially for being an early adaptor of
the quirk framework and for keeping at this during this thorough review
from all sides. Thanks to the reviewers as well!


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