At86rf212B(driver at86rf230), Ralink MT7228, cs1 always high

At86rf212B(driver at86rf230), Ralink MT7228, cs1 always high

[Baptiste Clenet]

Hi,

I'm working on the board Ralink MT7228 with an Atmel AT86RF212B by SPI.
I've configured the transceiver to be on cs1. I plugged cs from the
transceiver to pin 6 of MT7228.
I've edited spi-mt7621.c to allow two slave on SPI master as follow:

static void mt7621_spi_set_cs(struct spi_device *spi, int enable)
{
  struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
  u32 polar = mt7621_spi_read(rs, MT7621_SPI_POLAR);

  if (enable) {
    if (spi->chip_select) {
      polar |= 0x02;
    } else {
      polar |= 0x01;
    }
  } else {
    if (spi->chip_select) {
      polar &= ~0x02;
    } else {
      polar &= ~0x01;
    }
  }
  mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
}
And updated the num-chipselect:
master->num_chipselect = 2;


Here is my dmesg | grep spi:
[    0.440000] rt2880-pinmux pinctrl: found group selector 8 for spi
[    0.440000] rt2880-pinmux pinctrl: request pin 7 (io7) for 10000b00.spi
[    0.440000] rt2880-pinmux pinctrl: request pin 8 (io8) for 10000b00.spi
[    0.440000] rt2880-pinmux pinctrl: request pin 9 (io9) for 10000b00.spi
[    0.440000] rt2880-pinmux pinctrl: request pin 10 (io10) for 10000b00.spi
[    0.440000] m25p80 spi32766.0: found w25q128, expected en25q64
[    0.460000] m25p80 spi32766.0: w25q128 (16384 Kbytes)
[    0.470000] m25p80 spi32766.0: using chunked io
[    0.470000] 4 ofpart partitions found on MTD device spi32766.0
[    0.490000] Creating 4 MTD partitions on "spi32766.0":
[   11.830000] at86rf230 spi32766.1: Non-Atmel dev found (MAN_ID 00 00)
[   11.840000] at86rf230: probe of spi32766.1 failed with error -22

While looking at pin 6, it seems that it stays at high state instead
of going up and down when we go through mt7621_spi_set_cs().

Here we can see that pin 6 is not part of spi pins group. Well it is
defined in spi_cs1 group.
 From the datasheet:
5:4    SPI_CS1_MODE   SPI CS1 GPIO mode
                                     2: REFCLK
                                     1: GPIO
                                     0: SPI CS1
and SPI
12     SPI_MODE           SPI GPIO mode
                                     1: GPIO
                                     0: SPI
(from REG 10000060 GPIO1 MODE)
I'm wondering if pinmux is well set?

How may I be sure that this register is well configured? and gpio is
correctly configured for that purpose? And how and where may
configured them?


Cheers,
Baptiste

Re: At86rf212B(driver at86rf230), Ralink MT7228, cs1 always high

[Alexander Aring]

On Fri, May 29, 2015 at 11:28:48AM +0200, Baptiste Clenet wrote:
> Hi,
> 
> I'm working on the board Ralink MT7228 with an Atmel AT86RF212B by SPI.
> I've configured the transceiver to be on cs1. I plugged cs from the
> transceiver to pin 6 of MT7228.
> I've edited spi-mt7621.c to allow two slave on SPI master as follow:
> 

sorry, I have no idea what you mean and did there. To make the
chipselect right I suppose this part of spi subsystem, you don't need
(if you don't doing hacks) to touch anything at driver layer. What you
need is to tell the spi subsystem the right configuration so the spi
controller can do the right thing.

I also tried to google "Ralink MT7228" without luck.

Do you boot via device tree or the old way?

- Alex

Re: At86rf212B(driver at86rf230), Ralink MT7228, cs1 always high

[Baptiste Clenet]

Sorry, it was Ralink MT7628.
I boot via device tree yes and the dts is configured to use AT86RF212B
with chip select 1 :

palmbus@10000000 {
  spi@b00 {
      status = "okay";

      m25p80@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "en25q64";
        reg = <0 0>;
        ...
      };

      at86rf212@0 {
          compatible = "atmel,at86rf212";
          reg = <1>;
          interrupts = <15 4>;
          interrupt-parent = <&intc>;
          reset-gpio = <&gpio0 16 1>;
          sleep-gpio = <&gpio0 17 1>;
          spi-max-frequency = <1000000>;
      };
  };
};


This didn't work so I had a look a the spi driver spi-mt7621.c and I
saw that the driver wasn't implemented FOR two chip selects. This is
why I change the function "static void mt7621_spi_set_cs();" (last
message)

Does it make sense?

2015-05-31 14:34 GMT+02:00 Alexander Aring <alex.aring@gmail.com>:
> On Fri, May 29, 2015 at 11:28:48AM +0200, Baptiste Clenet wrote:
>> Hi,
>>
>> I'm working on the board Ralink MT7228 with an Atmel AT86RF212B by SPI.
>> I've configured the transceiver to be on cs1. I plugged cs from the
>> transceiver to pin 6 of MT7228.
>> I've edited spi-mt7621.c to allow two slave on SPI master as follow:
>>
>
> sorry, I have no idea what you mean and did there. To make the
> chipselect right I suppose this part of spi subsystem, you don't need
> (if you don't doing hacks) to touch anything at driver layer. What you
> need is to tell the spi subsystem the right configuration so the spi
> controller can do the right thing.
>
> I also tried to google "Ralink MT7228" without luck.
>
> Do you boot via device tree or the old way?
>
> - Alex

Re: At86rf212B(driver at86rf230), Ralink MT7228, cs1 always high

[Alexander Aring]

On Mon, Jun 01, 2015 at 09:00:30AM +0200, Baptiste Clenet wrote:
> Sorry, it was Ralink MT7628.
> I boot via device tree yes and the dts is configured to use AT86RF212B
> with chip select 1 :
> 
> palmbus@10000000 {
>   spi@b00 {
>       status = "okay";
> 
>       m25p80@0 {
>         #address-cells = <1>;
>         #size-cells = <1>;
>         compatible = "en25q64";
>         reg = <0 0>;
>         ...
>       };
> 
>       at86rf212@0 {
>           compatible = "atmel,at86rf212";
>           reg = <1>;

this normally represents the chip select, I don't know if this is just
eye candy or it's _really_ evaluated.

>           interrupts = <15 4>;
>           interrupt-parent = <&intc>;
>           reset-gpio = <&gpio0 16 1>;
>           sleep-gpio = <&gpio0 17 1>;
>           spi-max-frequency = <1000000>;
>       };
>   };
> };
> 
> 
> This didn't work so I had a look a the spi driver spi-mt7621.c and I
> saw that the driver wasn't implemented FOR two chip selects. This is
> why I change the function "static void mt7621_spi_set_cs();" (last
> message)
> 
> Does it make sense?
> 

I think it could make sense, depends what the hardware designer for Ralink
MT7628 did there.

First you need to figure out "who" make your chip select. I mean with
this question, if your SPI controller do the chip select or is it
software triggered by GPIO.

I don't know the spi subsystem much if the lastest one is ever supported
or you need to implement yourself (if possible). I think the spi subsystem
supports that, but I never setup such configuration.

If it's triggered by GPIO (this smells like the spi-mt7621.c function),
you need to care that the cs is handled by software correctly and now I
think that this can have 100 issues why it's not working currently in
your setup.

I think this is more a spi specific question and you should ask on:

http://vger.kernel.org/vger-lists.html#linux-spi

or get commercial support. Sorry, but I can't really help your with a
generic spi question and your issue smells like "reading zeros" on the
bus only.

- Alex

Re: At86rf212B(driver at86rf230), Ralink MT7228, cs1 always high

[Baptiste Clenet]

Thank you for your answer. Yes reg = <1>; selects the chip select.
I'm going to send an email at
http://vger.kernel.org/vger-lists.html#linux-spi because I think is
spi-related and not just the conf.
This is handled by hardware, the spi of MT7628 supports two slaves.

And yes, as far as I can see on dmesg, I only read 0.

Thanks,

Baptiste

2015-06-01 9:28 GMT+02:00 Alexander Aring <alex.aring@gmail.com>:
> On Mon, Jun 01, 2015 at 09:00:30AM +0200, Baptiste Clenet wrote:
>> Sorry, it was Ralink MT7628.
>> I boot via device tree yes and the dts is configured to use AT86RF212B
>> with chip select 1 :
>>
>> palmbus@10000000 {
>>   spi@b00 {
>>       status = "okay";
>>
>>       m25p80@0 {
>>         #address-cells = <1>;
>>         #size-cells = <1>;
>>         compatible = "en25q64";
>>         reg = <0 0>;
>>         ...
>>       };
>>
>>       at86rf212@0 {
>>           compatible = "atmel,at86rf212";
>>           reg = <1>;
>
> this normally represents the chip select, I don't know if this is just
> eye candy or it's _really_ evaluated.
>
>>           interrupts = <15 4>;
>>           interrupt-parent = <&intc>;
>>           reset-gpio = <&gpio0 16 1>;
>>           sleep-gpio = <&gpio0 17 1>;
>>           spi-max-frequency = <1000000>;
>>       };
>>   };
>> };
>>
>>
>> This didn't work so I had a look a the spi driver spi-mt7621.c and I
>> saw that the driver wasn't implemented FOR two chip selects. This is
>> why I change the function "static void mt7621_spi_set_cs();" (last
>> message)
>>
>> Does it make sense?
>>
>
> I think it could make sense, depends what the hardware designer for Ralink
> MT7628 did there.
>
> First you need to figure out "who" make your chip select. I mean with
> this question, if your SPI controller do the chip select or is it
> software triggered by GPIO.
>
> I don't know the spi subsystem much if the lastest one is ever supported
> or you need to implement yourself (if possible). I think the spi subsystem
> supports that, but I never setup such configuration.
>
> If it's triggered by GPIO (this smells like the spi-mt7621.c function),
> you need to care that the cs is handled by software correctly and now I
> think that this can have 100 issues why it's not working currently in
> your setup.
>
> I think this is more a spi specific question and you should ask on:
>
> http://vger.kernel.org/vger-lists.html#linux-spi
>
> or get commercial support. Sorry, but I can't really help your with a
> generic spi question and your issue smells like "reading zeros" on the
> bus only.
>
> - Alex