arm64 softfloat

arm64 softfloat

[Leif Lindholm]

Hi,

As I mentioned yeaterday, I ran into some toolchain issues yesterday.
When attempting my first build on Fedora 22, which uses GCC5.1, the
build fails. First with an internal compiler error, and with a
workaround for that, it simply refuses to go past.

Basically, AArch64 (arm64) does not define a soft-float ABI. Recent
versions of GCC now (presumably correctly) bails out when encountering
floating-point if +nofp has been specified in -march flags. Also, the
UEFI specification mandates that for aarch64 the cpu is configured
such that floating-point exceptions are not generated - so it should
be safe to generate floating-point instructions.

So would it be possible to do something like the below?:

From a1821c9222bab447b2d3faccf69e518c65e0f638 Mon Sep 17 00:00:00 2001
From: Leif Lindholm <leif.lindholm@linaro.org>
Date: Mon, 1 Jun 2015 23:58:44 +0100
Subject: [PATCH] arm64: do not force-enable soft-float

AArch64 (arm64) does not define a soft-float ABI. GCC5.1 now (presumably
correctly) bails out when encountering floating-point if +nofp has been
specified in -march flags. Also, the UEFI specification mandates that
the cpu is configured such that floating-point exceptions are not
generated - so it should be safe to generate floating-point instructions.

So drop +nofp and +nosimd from configure.ac for arm64.

Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 configure.ac | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/configure.ac b/configure.ac
index 891c14f..0a6d2e9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -686,9 +686,8 @@ if test x"$platform" != xemu ; then
   AC_CACHE_CHECK([for options to get soft-float], grub_cv_target_cc_soft_float, [
     grub_cv_target_cc_soft_float=no
     if test "x$target_cpu" = xarm64; then
-       CFLAGS="$TARGET_CFLAGS -march=armv8-a+nofp+nosimd -Werror"
-       AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
-		         [grub_cv_target_cc_soft_float="-march=armv8-a+nofp+nosimd"], [])
+       CFLAGS="$TARGET_CFLAGS -Werror"
+       grub_cv_target_cc_soft_float=""
     fi
     if test "x$target_cpu" = xia64; then
        CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror"
@@ -720,15 +719,7 @@ if test x"$platform" != xemu ; then
       TARGET_CFLAGS="$TARGET_CFLAGS $grub_cv_target_cc_soft_float"
       ;;
   esac
-  case x"$grub_cv_target_cc_soft_float" in
-    x"-march=armv8-a+nofp+nosimd")
-      # +nosimd disables also the cache opcodes that we need in asm.
-      TARGET_CCASFLAGS="$TARGET_CCASFLAGS -march=armv8-a+nofp"
-      ;;
-    *)
-      TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
-      ;;
-  esac
+  TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
 
 fi
 
-- 
2.1.4

Re: arm64 softfloat

[Vladimir 'phcoder' Serbinenko]

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Please give more details as to where we have floats. We shouldn't have any
On Jun 2, 2015 14:09, "Leif Lindholm" <leif.lindholm@linaro.org> wrote:

> Hi,
>
> As I mentioned yeaterday, I ran into some toolchain issues yesterday.
> When attempting my first build on Fedora 22, which uses GCC5.1, the
> build fails. First with an internal compiler error, and with a
> workaround for that, it simply refuses to go past.
>
> Basically, AArch64 (arm64) does not define a soft-float ABI. Recent
> versions of GCC now (presumably correctly) bails out when encountering
> floating-point if +nofp has been specified in -march flags. Also, the
> UEFI specification mandates that for aarch64 the cpu is configured
> such that floating-point exceptions are not generated - so it should
> be safe to generate floating-point instructions.
>
> So would it be possible to do something like the below?:
>
> From a1821c9222bab447b2d3faccf69e518c65e0f638 Mon Sep 17 00:00:00 2001
> From: Leif Lindholm <leif.lindholm@linaro.org>
> Date: Mon, 1 Jun 2015 23:58:44 +0100
> Subject: [PATCH] arm64: do not force-enable soft-float
>
> AArch64 (arm64) does not define a soft-float ABI. GCC5.1 now (presumably
> correctly) bails out when encountering floating-point if +nofp has been
> specified in -march flags. Also, the UEFI specification mandates that
> the cpu is configured such that floating-point exceptions are not
> generated - so it should be safe to generate floating-point instructions.
>
> So drop +nofp and +nosimd from configure.ac for arm64.
>
> Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
>  configure.ac | 15 +++------------
>  1 file changed, 3 insertions(+), 12 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index 891c14f..0a6d2e9 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -686,9 +686,8 @@ if test x"$platform" != xemu ; then
>    AC_CACHE_CHECK([for options to get soft-float],
> grub_cv_target_cc_soft_float, [
>      grub_cv_target_cc_soft_float=no
>      if test "x$target_cpu" = xarm64; then
> -       CFLAGS="$TARGET_CFLAGS -march=armv8-a+nofp+nosimd -Werror"
> -       AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
> -
> [grub_cv_target_cc_soft_float="-march=armv8-a+nofp+nosimd"], [])
> +       CFLAGS="$TARGET_CFLAGS -Werror"
> +       grub_cv_target_cc_soft_float=""
>      fi
>      if test "x$target_cpu" = xia64; then
>         CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt
> -Werror"
> @@ -720,15 +719,7 @@ if test x"$platform" != xemu ; then
>        TARGET_CFLAGS="$TARGET_CFLAGS $grub_cv_target_cc_soft_float"
>        ;;
>    esac
> -  case x"$grub_cv_target_cc_soft_float" in
> -    x"-march=armv8-a+nofp+nosimd")
> -      # +nosimd disables also the cache opcodes that we need in asm.
> -      TARGET_CCASFLAGS="$TARGET_CCASFLAGS -march=armv8-a+nofp"
> -      ;;
> -    *)
> -      TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
> -      ;;
> -  esac
> +  TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
>
>  fi
>
> --
> 2.1.4
>
>
>
> _______________________________________________
> Grub-devel mailing list
> Grub-devel@gnu.org
> https://lists.gnu.org/mailman/listinfo/grub-devel
>

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Re: arm64 softfloat

[Leif Lindholm]

On Tue, Jun 02, 2015 at 02:25:15PM +0200, Vladimir 'phcoder' Serbinenko wrote:
> Please give more details as to where we have floats. We shouldn't have any

Ok, seems I was tripping over myself with the internal compiler error
workaround (-mgeneral-regs-only), and applying it on the host tools
as well, where +nofp was (correctly) not being enforced, causing a
clash.

So, rewinding a bit - in order to work around the gcc 5.1 build issue
(which is not Fedora specific), we can use -mgeneral-regs-only
instead of -march=armv8-a+nofp. If we do this, we can also get
rid of the arm64-specific twiddling that drops the +nosimd.

Like so:

From 43d4231432838821cabe4f6aea4f0f50e87af9c4 Mon Sep 17 00:00:00 2001
From: Leif Lindholm <leif.lindholm@linaro.org>
Date: Tue, 2 Jun 2015 15:41:09 +0100
Subject: [PATCH] configure.ac: clean up arm64 soft-float handling

Fix compilation with gcc 5.1 (avoid internal compiler error), by
replacing explicit -march +nofp+nosimd options with -mgeneral-regs-only.

This also enables the removal of some further conditional build flag
setting.
---
 configure.ac | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)

diff --git a/configure.ac b/configure.ac
index 891c14f..fd8a62e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -686,9 +686,9 @@ if test x"$platform" != xemu ; then
   AC_CACHE_CHECK([for options to get soft-float], grub_cv_target_cc_soft_float, [
     grub_cv_target_cc_soft_float=no
     if test "x$target_cpu" = xarm64; then
-       CFLAGS="$TARGET_CFLAGS -march=armv8-a+nofp+nosimd -Werror"
+       CFLAGS="$TARGET_CFLAGS -mgeneral-regs-only -Werror"
        AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
-		         [grub_cv_target_cc_soft_float="-march=armv8-a+nofp+nosimd"], [])
+		         [grub_cv_target_cc_soft_float="-mgeneral-regs-only"], [])
     fi
     if test "x$target_cpu" = xia64; then
        CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror"
@@ -720,15 +720,7 @@ if test x"$platform" != xemu ; then
       TARGET_CFLAGS="$TARGET_CFLAGS $grub_cv_target_cc_soft_float"
       ;;
   esac
-  case x"$grub_cv_target_cc_soft_float" in
-    x"-march=armv8-a+nofp+nosimd")
-      # +nosimd disables also the cache opcodes that we need in asm.
-      TARGET_CCASFLAGS="$TARGET_CCASFLAGS -march=armv8-a+nofp"
-      ;;
-    *)
-      TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
-      ;;
-  esac
+  TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
 
 fi
 
-- 
2.1.4

Re: arm64 softfloat

[Vladimir 'φ-coder/phcoder' Serbinenko]

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On 02.06.2015 16:55, Leif Lindholm wrote:
> On Tue, Jun 02, 2015 at 02:25:15PM +0200, Vladimir 'phcoder' Serbinenko wrote:
>> Please give more details as to where we have floats. We shouldn't have any
> 
> Ok, seems I was tripping over myself with the internal compiler error
> workaround (-mgeneral-regs-only), and applying it on the host tools
> as well, where +nofp was (correctly) not being enforced, causing a
> clash.
> 
What is the relation of -mgeneral-regs-only with +nofp? The decription
of -mgeneral-regs-only in manual is very vague
> So, rewinding a bit - in order to work around the gcc 5.1 build issue
> (which is not Fedora specific), we can use -mgeneral-regs-only
> instead of -march=armv8-a+nofp. If we do this, we can also get
> rid of the arm64-specific twiddling that drops the +nosimd.
> 
> Like so:
> 
>>From 43d4231432838821cabe4f6aea4f0f50e87af9c4 Mon Sep 17 00:00:00 2001
> From: Leif Lindholm <leif.lindholm@linaro.org>
> Date: Tue, 2 Jun 2015 15:41:09 +0100
> Subject: [PATCH] configure.ac: clean up arm64 soft-float handling
> 
> Fix compilation with gcc 5.1 (avoid internal compiler error), by
> replacing explicit -march +nofp+nosimd options with -mgeneral-regs-only.
> 
> This also enables the removal of some further conditional build flag
> setting.
> ---
>  configure.ac | 14 +++-----------
>  1 file changed, 3 insertions(+), 11 deletions(-)
> 
> diff --git a/configure.ac b/configure.ac
> index 891c14f..fd8a62e 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -686,9 +686,9 @@ if test x"$platform" != xemu ; then
>    AC_CACHE_CHECK([for options to get soft-float], grub_cv_target_cc_soft_float, [
>      grub_cv_target_cc_soft_float=no
>      if test "x$target_cpu" = xarm64; then
> -       CFLAGS="$TARGET_CFLAGS -march=armv8-a+nofp+nosimd -Werror"
> +       CFLAGS="$TARGET_CFLAGS -mgeneral-regs-only -Werror"
>         AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
> -		         [grub_cv_target_cc_soft_float="-march=armv8-a+nofp+nosimd"], [])
> +		         [grub_cv_target_cc_soft_float="-mgeneral-regs-only"], [])
>      fi
>      if test "x$target_cpu" = xia64; then
>         CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror"
> @@ -720,15 +720,7 @@ if test x"$platform" != xemu ; then
>        TARGET_CFLAGS="$TARGET_CFLAGS $grub_cv_target_cc_soft_float"
>        ;;
>    esac
> -  case x"$grub_cv_target_cc_soft_float" in
> -    x"-march=armv8-a+nofp+nosimd")
> -      # +nosimd disables also the cache opcodes that we need in asm.
> -      TARGET_CCASFLAGS="$TARGET_CCASFLAGS -march=armv8-a+nofp"
> -      ;;
> -    *)
> -      TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
> -      ;;
> -  esac
> +  TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
>  
>  fi
>  
> 



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Re: arm64 softfloat

[Andrei Borzenkov]

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В Tue, 02 Jun 2015 18:37:32 +0200
Vladimir 'φ-coder/phcoder' Serbinenko <phcoder@gmail.com> пишет:

> On 02.06.2015 16:55, Leif Lindholm wrote:
> > On Tue, Jun 02, 2015 at 02:25:15PM +0200, Vladimir 'phcoder' Serbinenko wrote:
> >> Please give more details as to where we have floats. We shouldn't have any
> > 
> > Ok, seems I was tripping over myself with the internal compiler error
> > workaround (-mgeneral-regs-only), and applying it on the host tools
> > as well, where +nofp was (correctly) not being enforced, causing a
> > clash.
> > 
> What is the relation of -mgeneral-regs-only with +nofp? The decription
> of -mgeneral-regs-only in manual is very vague

According to
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0774a/chr1392305446662.html

1.16 -mgeneral-regs-only

Prevents the use of floating-point instructions or floating-point registers.
Note
The -mgeneral-regs-only option is only valid with the aarch64-arm-none-eabi target. Use -mfpu=none to prevent the use of floating-point instructions or floating-point registers for the armv8a-arm-none-eabi target.

The description is for armclang; we can just hope that GCC is using the
same semantic.

> > So, rewinding a bit - in order to work around the gcc 5.1 build issue
> > (which is not Fedora specific), we can use -mgeneral-regs-only
> > instead of -march=armv8-a+nofp. If we do this, we can also get
> > rid of the arm64-specific twiddling that drops the +nosimd.
> > 
> > Like so:
> > 
> >>From 43d4231432838821cabe4f6aea4f0f50e87af9c4 Mon Sep 17 00:00:00 2001
> > From: Leif Lindholm <leif.lindholm@linaro.org>
> > Date: Tue, 2 Jun 2015 15:41:09 +0100
> > Subject: [PATCH] configure.ac: clean up arm64 soft-float handling
> > 
> > Fix compilation with gcc 5.1 (avoid internal compiler error), by
> > replacing explicit -march +nofp+nosimd options with -mgeneral-regs-only.
> > 
> > This also enables the removal of some further conditional build flag
> > setting.
> > ---
> >  configure.ac | 14 +++-----------
> >  1 file changed, 3 insertions(+), 11 deletions(-)
> > 
> > diff --git a/configure.ac b/configure.ac
> > index 891c14f..fd8a62e 100644
> > --- a/configure.ac
> > +++ b/configure.ac
> > @@ -686,9 +686,9 @@ if test x"$platform" != xemu ; then
> >    AC_CACHE_CHECK([for options to get soft-float], grub_cv_target_cc_soft_float, [
> >      grub_cv_target_cc_soft_float=no
> >      if test "x$target_cpu" = xarm64; then
> > -       CFLAGS="$TARGET_CFLAGS -march=armv8-a+nofp+nosimd -Werror"
> > +       CFLAGS="$TARGET_CFLAGS -mgeneral-regs-only -Werror"
> >         AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
> > -		         [grub_cv_target_cc_soft_float="-march=armv8-a+nofp+nosimd"], [])
> > +		         [grub_cv_target_cc_soft_float="-mgeneral-regs-only"], [])
> >      fi
> >      if test "x$target_cpu" = xia64; then
> >         CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror"
> > @@ -720,15 +720,7 @@ if test x"$platform" != xemu ; then
> >        TARGET_CFLAGS="$TARGET_CFLAGS $grub_cv_target_cc_soft_float"
> >        ;;
> >    esac
> > -  case x"$grub_cv_target_cc_soft_float" in
> > -    x"-march=armv8-a+nofp+nosimd")
> > -      # +nosimd disables also the cache opcodes that we need in asm.
> > -      TARGET_CCASFLAGS="$TARGET_CCASFLAGS -march=armv8-a+nofp"
> > -      ;;
> > -    *)
> > -      TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
> > -      ;;
> > -  esac
> > +  TARGET_CCASFLAGS="$TARGET_CCASFLAGS $grub_cv_target_cc_soft_float"
> >  
> >  fi
> >  
> > 
> 
> 


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Re: arm64 softfloat

[Leif Lindholm]

On Tue, Jun 02, 2015 at 07:51:12PM +0300, Andrei Borzenkov wrote:
> > What is the relation of -mgeneral-regs-only with +nofp? The decription
> > of -mgeneral-regs-only in manual is very vague
> 
> According to
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0774a/chr1392305446662.html

That is ARM's commercial clang-based compiler suite though, not
upstream clang.
 
> 1.16 -mgeneral-regs-only
> 
> Prevents the use of floating-point instructions or floating-point registers.
> Note
> The -mgeneral-regs-only option is only valid with the aarch64-arm-none-eabi target. Use -mfpu=none to prevent the use of floating-point instructions or floating-point registers for the armv8a-arm-none-eabi target.
> 
> The description is for armclang; we can just hope that GCC is using the
> same semantic.

https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
---
Generate code which uses only the general registers. 
---

http://clang.llvm.org/docs/UsersManual.html
---
Generate code which only uses the general purpose registers.

This option restricts the generated code to use general registers
only. This only applies to the AArch64 architecture.
---

/
    Leif

Re: arm64 softfloat

[Andrei Borzenkov]

В Wed, 3 Jun 2015 12:06:50 +0100
Leif Lindholm <leif.lindholm@linaro.org> пишет:

> On Tue, Jun 02, 2015 at 07:51:12PM +0300, Andrei Borzenkov wrote:
> > > What is the relation of -mgeneral-regs-only with +nofp? The decription
> > > of -mgeneral-regs-only in manual is very vague
> > 
> > According to
> > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0774a/chr1392305446662.html
> 
> That is ARM's commercial clang-based compiler suite though, not
> upstream clang.
>  
> > 1.16 -mgeneral-regs-only
> > 
> > Prevents the use of floating-point instructions or floating-point registers.
> > Note
> > The -mgeneral-regs-only option is only valid with the aarch64-arm-none-eabi target. Use -mfpu=none to prevent the use of floating-point instructions or floating-point registers for the armv8a-arm-none-eabi target.
> > 
> > The description is for armclang; we can just hope that GCC is using the
> > same semantic.
> 
> https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
> ---
> Generate code which uses only the general registers. 
> ---
> 

Sure, I know this. Unfortunately it does not say how it is related to
floating point arithmetic at all. armclang at least makes it explicit.

> http://clang.llvm.org/docs/UsersManual.html
> ---
> Generate code which only uses the general purpose registers.
> 
> This option restricts the generated code to use general registers
> only. This only applies to the AArch64 architecture.
> ---
> 
> /
>     Leif
> 
> _______________________________________________
> Grub-devel mailing list
> Grub-devel@gnu.org
> https://lists.gnu.org/mailman/listinfo/grub-devel

Re: arm64 softfloat

[Leif Lindholm]

On Wed, Jun 03, 2015 at 07:29:16PM +0300, Andrei Borzenkov wrote:
> В Wed, 3 Jun 2015 12:06:50 +0100
> Leif Lindholm <leif.lindholm@linaro.org> пишет:
> 
> > On Tue, Jun 02, 2015 at 07:51:12PM +0300, Andrei Borzenkov wrote:
> > > > What is the relation of -mgeneral-regs-only with +nofp? The decription
> > > > of -mgeneral-regs-only in manual is very vague
> > > 
> > > According to
> > > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0774a/chr1392305446662.html
> > 
> > That is ARM's commercial clang-based compiler suite though, not
> > upstream clang.
> >  
> > > 1.16 -mgeneral-regs-only
> > > 
> > > Prevents the use of floating-point instructions or floating-point registers.
> > > Note
> > > The -mgeneral-regs-only option is only valid with the aarch64-arm-none-eabi target. Use -mfpu=none to prevent the use of floating-point instructions or floating-point registers for the armv8a-arm-none-eabi target.
> > > 
> > > The description is for armclang; we can just hope that GCC is using the
> > > same semantic.
> > 
> > https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
> > ---
> > Generate code which uses only the general registers. 
> > ---
> 
> Sure, I know this. Unfortunately it does not say how it is related to
> floating point arithmetic at all. armclang at least makes it explicit.

While it could more explicit, I am not aware of any A64 floating-point
instructions that can operate without floating-point registers.

Also, I spoke with the ARM gcc devs - the gcc documentation is
intended to be improved to also state that "-mgeneral-regs-only is
equivalent to +nofp being specified".

/
    Leif

Re: arm64 softfloat

[Andrei Borzenkov]

В Wed, 3 Jun 2015 17:52:12 +0100
Leif Lindholm <leif.lindholm@linaro.org> пишет:

> > > 
> > > https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
> > > ---
> > > Generate code which uses only the general registers. 
> > > ---
> > 
> > Sure, I know this. Unfortunately it does not say how it is related to
> > floating point arithmetic at all. armclang at least makes it explicit.
> 
> While it could more explicit, I am not aware of any A64 floating-point
> instructions that can operate without floating-point registers.
> 
> Also, I spoke with the ARM gcc devs - the gcc documentation is
> intended to be improved to also state that "-mgeneral-regs-only is
> equivalent to +nofp being specified".
> 


Sounds like it is OK then.

Re: arm64 softfloat

[Vladimir 'phcoder' Serbinenko]

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Ok with me as well. Go ahead
On Jun 3, 2015 8:10 PM, "Andrei Borzenkov" <arvidjaar@gmail.com> wrote:

> В Wed, 3 Jun 2015 17:52:12 +0100
> Leif Lindholm <leif.lindholm@linaro.org> пишет:
>
> > > >
> > > > https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
> > > > ---
> > > > Generate code which uses only the general registers.
> > > > ---
> > >
> > > Sure, I know this. Unfortunately it does not say how it is related to
> > > floating point arithmetic at all. armclang at least makes it explicit.
> >
> > While it could more explicit, I am not aware of any A64 floating-point
> > instructions that can operate without floating-point registers.
> >
> > Also, I spoke with the ARM gcc devs - the gcc documentation is
> > intended to be improved to also state that "-mgeneral-regs-only is
> > equivalent to +nofp being specified".
> >
>
>
> Sounds like it is OK then.
>

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