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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Mike Turquette <mturquette@linaro.org>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Emilio Lopez <emilio@elopez.com.ar>
Cc: Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/7] clk: sunxi: Add support for the Audio PLL
Date: Thu, 4 Jun 2015 15:27:52 +0200	[thread overview]
Message-ID: <20150604132752.GM23777@lukather> (raw)
In-Reply-To: <1432241646-9511-1-git-send-email-maxime.ripard@free-electrons.com>

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Hi Mike, Stephen,

On Thu, May 21, 2015 at 10:53:59PM +0200, Maxime Ripard wrote:
> Hi,
> 
> This serie adds support for the PLL2 aka the Audio PLL on the
> Allwinner A10 and the later SoCs.
> 
> This is the first stepping stone to get the audio support merged.
> 
> This serie is built on top of a generic clk-factor driver to handle
> clock that multiply their parent clock rate (mostly PLL's), in order
> to provide the driver for the PLL2 base clock, and then adds the
> drivers for the clock that derive from the Audio PLL.
> 
> Thanks!
> Maxime
> 

Any comments on that (especially the first patch)?

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/7] clk: sunxi: Add support for the Audio PLL
Date: Thu, 4 Jun 2015 15:27:52 +0200	[thread overview]
Message-ID: <20150604132752.GM23777@lukather> (raw)
In-Reply-To: <1432241646-9511-1-git-send-email-maxime.ripard@free-electrons.com>

Hi Mike, Stephen,

On Thu, May 21, 2015 at 10:53:59PM +0200, Maxime Ripard wrote:
> Hi,
> 
> This serie adds support for the PLL2 aka the Audio PLL on the
> Allwinner A10 and the later SoCs.
> 
> This is the first stepping stone to get the audio support merged.
> 
> This serie is built on top of a generic clk-factor driver to handle
> clock that multiply their parent clock rate (mostly PLL's), in order
> to provide the driver for the PLL2 base clock, and then adds the
> drivers for the clock that derive from the Audio PLL.
> 
> Thanks!
> Maxime
> 

Any comments on that (especially the first patch)?

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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  parent reply	other threads:[~2015-06-04 13:27 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-21 20:53 [PATCH v2 0/7] clk: sunxi: Add support for the Audio PLL Maxime Ripard
2015-05-21 20:53 ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 1/7] clk: Add a basic factor clock Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-05-22  4:35   ` Chen-Yu Tsai
2015-05-22  4:35     ` Chen-Yu Tsai
2015-05-23  7:49     ` Maxime Ripard
2015-05-23  7:49       ` Maxime Ripard
2015-07-24  0:00       ` Michael Turquette
2015-07-24  0:00         ` Michael Turquette
2015-07-24  6:50         ` Maxime Ripard
2015-07-24  6:50           ` Maxime Ripard
2015-07-24 18:26           ` Michael Turquette
2015-07-24 18:26             ` Michael Turquette
2015-07-25  7:39             ` Maxime Ripard
2015-07-25  7:39               ` Maxime Ripard
2015-08-11 21:30               ` Michael Turquette
2015-08-11 21:30                 ` Michael Turquette
2015-08-19  9:13                 ` Maxime Ripard
2015-08-19  9:13                   ` Maxime Ripard
2015-09-19  8:19           ` Maxime Ripard
2015-09-19  8:19             ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 2/7] clk: sunxi: Add a driver for the PLL2 Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 3/7] clk: sunxi: codec clock support Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 4/7] clk: sunxi: mod1 " Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 5/7] ARM: sunxi: Add PLL2 support Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 6/7] ARM: sunxi: Add codec clock support Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-05-21 20:54 ` [PATCH v2 7/7] ARM: sun7i: Add mod1 clock nodes Maxime Ripard
2015-05-21 20:54   ` Maxime Ripard
2015-06-04 13:27 ` Maxime Ripard [this message]
2015-06-04 13:27   ` [PATCH v2 0/7] clk: sunxi: Add support for the Audio PLL Maxime Ripard

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