Re: [PATCH 5/6] AMD-PVH: Support TSC_MODE_NEVER_EMULATE for PVH

[Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>]

On Mon, Jun 22, 2015 at 12:37:37PM -0400, elena.ufimtseva@oracle.com wrote:
> From: Elena Ufimtseva <elena.ufimtseva@oracle.com>
> 
> On AMD, MSR_AMD64_TSC_RATIO must be set for rdtsc instruction in guest
> to properly read the cpu tsc. To that end, set tsc_khz in struct domain.

It looks like the TSC_MODE_DEFAULT, TSC_MODE_ALWAYS_EMULATE, and
TSC_MODE_PVRDTSCP already set tsc_khz.

Only TSC_MODE_NEVER_EMULATE hadn't set it (but that
piece of code has some continuation from TSC_MODE_DEFAULT).

And we need this otherwise the CPU tsc offset has bogus data?

Anyway if this is the way to go, you can probably delete:

1968         d->arch.tsc_khz = cpu_khz;                                              

> 
> Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
> ---
>  xen/arch/x86/time.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
> index bbb7e6c..d9709ce 100644
> --- a/xen/arch/x86/time.c
> +++ b/xen/arch/x86/time.c
> @@ -1923,6 +1923,7 @@ void tsc_set_info(struct domain *d,
>           * but "always_emulate" does not for some reason.  Figure out
>           * why.
>           */
> +        d->arch.tsc_khz = cpu_khz;
>          switch ( tsc_mode )
>          {
>          case TSC_MODE_NEVER_EMULATE:
> -- 
> 1.9.3
>