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* [PATCH v3.10.y .. v3.14.y] ARM: clk-imx6q: refine sata's parent
@ 2015-06-27  8:12 Dirk Behme
  2015-07-01  9:21 ` Luis Henriques
  0 siblings, 1 reply; 2+ messages in thread
From: Dirk Behme @ 2015-06-27  8:12 UTC (permalink / raw)
  To: stable; +Cc: Sebastien Szymanski, Shawn Guo, Dirk Behme

From: Sebastien Szymanski <sebastien.szymanski@armadeus.com>

commit da946aeaeadcd24ff0cda9984c6fb8ed2bfd462a upstream.

According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg.

Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[dirk.behme: Adjust moved file and context]
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>

--

Index: github_linux.git/arch/arm/mach-imx/clk-imx6q.c
===================================================================
--- github_linux.git.orig/arch/arm/mach-imx/clk-imx6q.c	2015-06-13 08:03:18.874108966 +0200
+++ github_linux.git/arch/arm/mach-imx/clk-imx6q.c	2015-06-13 08:04:01.582110737 +0200
@@ -406,7 +406,7 @@
 	clk[gpmi_io]      = imx_clk_gate2("gpmi_io",       "enfc",              base + 0x78, 28);
 	clk[gpmi_apb]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);
 	clk[rom]          = imx_clk_gate2("rom",           "ahb",               base + 0x7c, 0);
-	clk[sata]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);
+	clk[sata]         = imx_clk_gate2("sata",          "ahb",               base + 0x7c, 4);
 	clk[sdma]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);
 	clk[spba]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);
 	clk[spdif]        = imx_clk_gate2("spdif",         "spdif_podf",    	base + 0x7c, 14);

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2015-06-27  8:12 [PATCH v3.10.y .. v3.14.y] ARM: clk-imx6q: refine sata's parent Dirk Behme
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