From: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>
To: qemu-devel@nongnu.org
Cc: rth7680@gmail.com, agraf@suse.de, pavel.dovgaluk@ispras.ru,
pbonzini@redhat.com, leon.alrae@imgtec.com, aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH v5 10/11] target-i386: remove useless PC updates
Date: Mon, 06 Jul 2015 11:26:33 +0300 [thread overview]
Message-ID: <20150706082633.11980.1253.stgit@PASHA-ISP> (raw)
In-Reply-To: <20150706082535.11980.88013.stgit@PASHA-ISP>
This patch removes useless PC updates before executing instructions.
PC can be recovered with correct exception handling by using TB return address.
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
---
target-i386/translate.c | 25 -------------------------
1 files changed, 0 insertions(+), 25 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 7a1bdee..14b3465 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -2303,7 +2303,6 @@ static void gen_movl_seg_T0(DisasContext *s, int seg_reg, target_ulong cur_eip)
if (s->pe && !s->vm86) {
/* XXX: optimize by finding processor state dynamically */
gen_update_cc_op(s);
- gen_jmp_im(cur_eip);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_load_seg(cpu_env, tcg_const_i32(seg_reg), cpu_tmp2_i32);
/* abort translation because the addseg value may change or
@@ -4842,21 +4841,17 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
case 6: /* div */
switch(ot) {
case MO_8:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_divb_AL(cpu_env, cpu_T[0]);
break;
case MO_16:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_divw_AX(cpu_env, cpu_T[0]);
break;
default:
case MO_32:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_divl_EAX(cpu_env, cpu_T[0]);
break;
#ifdef TARGET_X86_64
case MO_64:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_divq_EAX(cpu_env, cpu_T[0]);
break;
#endif
@@ -4865,21 +4860,17 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
case 7: /* idiv */
switch(ot) {
case MO_8:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_idivb_AL(cpu_env, cpu_T[0]);
break;
case MO_16:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_idivw_AX(cpu_env, cpu_T[0]);
break;
default:
case MO_32:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_idivl_EAX(cpu_env, cpu_T[0]);
break;
#ifdef TARGET_X86_64
case MO_64:
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_idivq_EAX(cpu_env, cpu_T[0]);
break;
#endif
@@ -5212,7 +5203,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
if (dflag == MO_64) {
if (!(s->cpuid_ext_features & CPUID_EXT_CX16))
goto illegal_op;
- gen_jmp_im(pc_start - s->cs_base);
gen_update_cc_op(s);
gen_lea_modrm(env, s, modrm);
gen_helper_cmpxchg16b(cpu_env, cpu_A0);
@@ -5221,7 +5211,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
{
if (!(s->cpuid_features & CPUID_CX8))
goto illegal_op;
- gen_jmp_im(pc_start - s->cs_base);
gen_update_cc_op(s);
gen_lea_modrm(env, s, modrm);
gen_helper_cmpxchg8b(cpu_env, cpu_A0);
@@ -5838,7 +5827,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
break;
case 0x0c: /* fldenv mem */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fldenv(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
break;
case 0x0d: /* fldcw mem */
@@ -5848,7 +5836,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
break;
case 0x0e: /* fnstenv mem */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fstenv(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
break;
case 0x0f: /* fnstcw mem */
@@ -5858,23 +5845,19 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
break;
case 0x1d: /* fldt mem */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fldt_ST0(cpu_env, cpu_A0);
break;
case 0x1f: /* fstpt mem */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fstt_ST0(cpu_env, cpu_A0);
gen_helper_fpop(cpu_env);
break;
case 0x2c: /* frstor mem */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_frstor(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
break;
case 0x2e: /* fnsave mem */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fsave(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
break;
case 0x2f: /* fnstsw mem */
@@ -5889,7 +5872,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
break;
case 0x3e: /* fbstp */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fbst_ST0(cpu_env, cpu_A0);
gen_helper_fpop(cpu_env);
break;
@@ -5925,7 +5907,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
case 0: /* fnop */
/* check exceptions (FreeBSD FPU probe) */
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fwait(cpu_env);
break;
default:
@@ -6896,7 +6877,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
} else {
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fwait(cpu_env);
}
break;
@@ -6980,7 +6960,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
goto illegal_op;
gen_op_mov_v_reg(ot, cpu_T[0], reg);
gen_lea_modrm(env, s, modrm);
- gen_jmp_im(pc_start - s->cs_base);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
if (ot == MO_16) {
gen_helper_boundw(cpu_env, cpu_A0, cpu_tmp2_i32);
@@ -7172,7 +7151,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
} else {
gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE);
gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
- gen_jmp_im(pc_start - s->cs_base);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_lldt(cpu_env, cpu_tmp2_i32);
}
@@ -7193,7 +7171,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
} else {
gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE);
gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
- gen_jmp_im(pc_start - s->cs_base);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_ltr(cpu_env, cpu_tmp2_i32);
}
@@ -7727,7 +7704,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
}
gen_lea_modrm(env, s, modrm);
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fxsave(cpu_env, cpu_A0, tcg_const_i32(dflag == MO_64));
break;
case 1: /* fxrstor */
@@ -7740,7 +7716,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
}
gen_lea_modrm(env, s, modrm);
gen_update_cc_op(s);
- gen_jmp_im(pc_start - s->cs_base);
gen_helper_fxrstor(cpu_env, cpu_A0, tcg_const_i32(dflag == MO_64));
break;
case 2: /* ldmxcsr */
next prev parent reply other threads:[~2015-07-06 8:26 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-06 8:25 [Qemu-devel] [PATCH v5 00/11] Fix exceptions handling for MIPS, PowerPC, and i386 Pavel Dovgalyuk
2015-07-06 8:25 ` [Qemu-devel] [PATCH v5 01/11] softmmu: add helper function to pass through retaddr Pavel Dovgalyuk
2015-07-06 10:22 ` Aurelien Jarno
2015-07-06 8:25 ` [Qemu-devel] [PATCH v5 02/11] cpu-exec: introduce loop exit with restore function Pavel Dovgalyuk
2015-07-06 10:22 ` Aurelien Jarno
2015-07-06 8:25 ` [Qemu-devel] [PATCH v5 03/11] target-mips: improve exceptions handling Pavel Dovgalyuk
2015-07-06 10:23 ` Aurelien Jarno
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 04/11] target-i386: introduce new raise_exception functions Pavel Dovgalyuk
2015-07-06 11:57 ` Richard Henderson
2015-07-06 12:12 ` Aurelien Jarno
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 05/11] target-i386: exception handling for FPU instructions Pavel Dovgalyuk
2015-07-06 12:04 ` Richard Henderson
2015-07-06 12:42 ` Pavel Dovgaluk
[not found] ` <559a77d3.4e58980a.7a073.ffff997eSMTPIN_ADDED_BROKEN@mx.google.com>
2015-07-06 15:11 ` Richard Henderson
2015-07-06 12:12 ` Aurelien Jarno
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 06/11] target-i386: exception handling for div instructions Pavel Dovgalyuk
2015-07-06 12:04 ` Richard Henderson
2015-07-06 12:14 ` Aurelien Jarno
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 07/11] target-i386: exception handling for memory helpers Pavel Dovgalyuk
2015-07-06 12:07 ` Richard Henderson
2015-07-06 12:19 ` Aurelien Jarno
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 08/11] target-i386: exception handling for seg_helper functions Pavel Dovgalyuk
2015-07-06 12:13 ` Richard Henderson
2015-07-06 12:15 ` Pavel Dovgaluk
2015-07-07 10:13 ` Pavel Dovgaluk
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 09/11] target-i386: exception handling for other helper functions Pavel Dovgalyuk
2015-07-06 8:26 ` Pavel Dovgalyuk [this message]
2015-07-06 12:21 ` [Qemu-devel] [PATCH v5 10/11] target-i386: remove useless PC updates Aurelien Jarno
2015-07-06 8:26 ` [Qemu-devel] [PATCH v5 11/11] target-ppc: exceptions handling in icount mode Pavel Dovgalyuk
2015-07-06 12:21 ` Aurelien Jarno
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