From: Stephen Boyd <sboyd@codeaurora.org>
To: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@gmail.com>,
Maxime Coquelin <maxime.coquelin@st.com>,
Patrice Chotard <patrice.chotard@st.com>,
Russell King <linux@arm.linux.org.uk>,
Michael Turquette <mturquette@baylibre.com>,
Peter Griffin <peter.griffin@linaro.org>,
Pankaj Dev <pankaj.dev@st.com>,
Olivier Bideau <olivier.bideau@st.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Fabian Frederick <fabf@skynet.be>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel@stlinux.com,
linux-clk@vger.kernel.org
Subject: Re: [PATCH 1/3] drivers: clk: st: Support for enable/disable in Clockgen PLLs
Date: Wed, 15 Jul 2015 16:48:23 -0700 [thread overview]
Message-ID: <20150715234823.GT30412@codeaurora.org> (raw)
In-Reply-To: <1436443060-12866-2-git-send-email-gabriel.fernandez@linaro.org>
On 07/09, Gabriel Fernandez wrote:
> @@ -270,6 +285,73 @@ static int clkgen_pll_is_enabled(struct clk_hw *hw)
> return !poweroff;
> }
>
> +static int __clkgen_pll_enable(struct clk_hw *hw)
> +{
> + struct clkgen_pll *pll = to_clkgen_pll(hw);
> + unsigned long timeout;
> + int ret = 0;
> +
> + if (clkgen_pll_is_enabled(hw))
> + return 0;
> +
> + CLKGEN_WRITE(pll, pdn_ctrl, 0);
> +
> + timeout = jiffies + msecs_to_jiffies(10);
Jiffies isn't guaranteed to increment here because
.enable/.disable is called with irqs disabled and if this is the
only CPU running it won't be getting interrupts to update
jiffies.
> +
> + while (!clkgen_pll_is_locked(hw)) {
> + if (time_after(jiffies, timeout))
> + return -ETIMEDOUT;
> + cpu_relax();
> + }
> +
> + pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__);
> +
> + return ret;
> +}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] drivers: clk: st: Support for enable/disable in Clockgen PLLs
Date: Wed, 15 Jul 2015 16:48:23 -0700 [thread overview]
Message-ID: <20150715234823.GT30412@codeaurora.org> (raw)
In-Reply-To: <1436443060-12866-2-git-send-email-gabriel.fernandez@linaro.org>
On 07/09, Gabriel Fernandez wrote:
> @@ -270,6 +285,73 @@ static int clkgen_pll_is_enabled(struct clk_hw *hw)
> return !poweroff;
> }
>
> +static int __clkgen_pll_enable(struct clk_hw *hw)
> +{
> + struct clkgen_pll *pll = to_clkgen_pll(hw);
> + unsigned long timeout;
> + int ret = 0;
> +
> + if (clkgen_pll_is_enabled(hw))
> + return 0;
> +
> + CLKGEN_WRITE(pll, pdn_ctrl, 0);
> +
> + timeout = jiffies + msecs_to_jiffies(10);
Jiffies isn't guaranteed to increment here because
.enable/.disable is called with irqs disabled and if this is the
only CPU running it won't be getting interrupts to update
jiffies.
> +
> + while (!clkgen_pll_is_locked(hw)) {
> + if (time_after(jiffies, timeout))
> + return -ETIMEDOUT;
> + cpu_relax();
> + }
> +
> + pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__);
> +
> + return ret;
> +}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Gabriel Fernandez
<gabriel.fernandez-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Srinivas Kandagatla
<srinivas.kandagatla-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Maxime Coquelin <maxime.coquelin-qxv4g6HH51o@public.gmane.org>,
Patrice Chotard <patrice.chotard-qxv4g6HH51o@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Peter Griffin
<peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Pankaj Dev <pankaj.dev-qxv4g6HH51o@public.gmane.org>,
Olivier Bideau <olivier.bideau-qxv4g6HH51o@public.gmane.org>,
Geert Uytterhoeven
<geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>,
Fabian Frederick <fabf-AgBVmzD5pcezQB+pC5nmwQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/3] drivers: clk: st: Support for enable/disable in Clockgen PLLs
Date: Wed, 15 Jul 2015 16:48:23 -0700 [thread overview]
Message-ID: <20150715234823.GT30412@codeaurora.org> (raw)
In-Reply-To: <1436443060-12866-2-git-send-email-gabriel.fernandez-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On 07/09, Gabriel Fernandez wrote:
> @@ -270,6 +285,73 @@ static int clkgen_pll_is_enabled(struct clk_hw *hw)
> return !poweroff;
> }
>
> +static int __clkgen_pll_enable(struct clk_hw *hw)
> +{
> + struct clkgen_pll *pll = to_clkgen_pll(hw);
> + unsigned long timeout;
> + int ret = 0;
> +
> + if (clkgen_pll_is_enabled(hw))
> + return 0;
> +
> + CLKGEN_WRITE(pll, pdn_ctrl, 0);
> +
> + timeout = jiffies + msecs_to_jiffies(10);
Jiffies isn't guaranteed to increment here because
.enable/.disable is called with irqs disabled and if this is the
only CPU running it won't be getting interrupts to update
jiffies.
> +
> + while (!clkgen_pll_is_locked(hw)) {
> + if (time_after(jiffies, timeout))
> + return -ETIMEDOUT;
> + cpu_relax();
> + }
> +
> + pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__);
> +
> + return ret;
> +}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
--
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next prev parent reply other threads:[~2015-07-15 23:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 11:57 [PATCH 0/3] ST PLL improvement Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
2015-07-09 11:57 ` [PATCH 1/3] drivers: clk: st: Support for enable/disable in Clockgen PLLs Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
2015-07-15 23:48 ` Stephen Boyd [this message]
2015-07-15 23:48 ` Stephen Boyd
2015-07-15 23:48 ` Stephen Boyd
2015-07-09 11:57 ` [PATCH 2/3] drivers: clk: st: PLL rate change implementation for DVFS Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
2015-07-09 11:57 ` [PATCH 3/3] drivers: clk: st: Correct the pll-type for A9 for stih418 Gabriel Fernandez
2015-07-09 11:57 ` Gabriel Fernandez
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