Re: [Qemu-devel] [PATCH RFC 8/9] tcg/optimize: do not simplify size changing moves

[Aurelien Jarno <aurelien@aurel32.net>]

On 2015-07-17 07:38, Richard Henderson wrote:
> On 07/15/2015 12:03 PM, Aurelien Jarno wrote:
> >Now that we have real size changing ops, we don't need to marked high
> >bits of the destination as garbage. The goal of the optimizer is to
> >predict the value of the temps (and not of the registers) and do
> >simplifications when possible. The problem there is therefore not the
> >fact that those bits are not counted as garbage, but that a size
> >changing op is replaced by a move.
> >
> >This patch is basically a revert of 24666baf, including the changes that
> >have been made since then.
> >
> >Cc: Paolo Bonzini <pbonzini@redhat.com>
> >Cc: Richard Henderson <rth@twiddle.net>
> >Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> 
> What we're missing here is whether the omitted size changing op is extu or
> exts.  Mask should be extended to match.  Which means keeping most of this
> code.

I am afraid your correct. Unfortunately one of my goal is to remove this
part in the optimizer, as I need that in a patch series I am preparing.
I have also tried to check the temp type directly from the optimizer (it
is accessible), but it has some performance impact. Propagating the
extu/exts as real opcode means propagating the information about size
changing up to the optimizer or the register allocator, without having
to recreate it from other available information.

For now I do wonder if we shouldn't get the size changing extu/exts
mandatory instead of reusing the 64-bit only version. This doesn't
change the generated code, at least on x86.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net