From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA
Date: Fri, 17 Jul 2015 22:22:11 +0200 [thread overview]
Message-ID: <201507172222.12039.marex@denx.de> (raw)
In-Reply-To: <55A95E5C.6030309@opensource.altera.com>
On Friday, July 17, 2015 at 09:58:20 PM, Dinh Nguyen wrote:
> On 07/12/2015 02:50 PM, Marek Vasut wrote:
> > On Friday, June 26, 2015 at 10:01:47 PM, Marek Vasut wrote:
> >> On Friday, June 26, 2015 at 06:43:13 PM, Marek Vasut wrote:
> >>> On Wednesday, June 03, 2015 at 05:52:47 AM,
> >>> dinguyen at opensource.altera.com
> >>>
> >>> wrote:
> >>>> From: Dinh Nguyen <dinguyen@opensource.altera.com>
> >>>>
> >>>> Hi,
> >>>>
> >>>> This is v4 of the patch series that adds the DDR controller driver for
> >>>> Altera's SoCFPGA platform.
> >>>>
> >>>> v4:
> >>>> - Further cleanup by removing comments that do not apply for Cyclone5.
> >>>> - Removed more unused functions
> >>>>
> >>>> Thanks,
> >>>
> >>> I applied this to u-boot/master and tried building for
> >>> socfpga_cyclone5, this is what I'm getting after I fixed these patches
> >>> to actually apply to u-boot/master (there was a minor conflict in
> >>> Makefile):
> >>>
> >>> drivers/ddr/altera/sdram.c:11:35: fatal error: asm/arch/sdram_config.h:
> >>> No such file or directory
> >>>
> >>> #include <asm/arch/sdram_config.h>
> >>
> >> OK, these files were misplaced by the patch. Now I got it to compile,
> >> only to see that when I try to init DRAM on sockit using those, PHY
> >> calibration fails (run_mem_calibrate() returns 1).
> >>
> >> btw. I also think sdram_config.h should go into board/altera/ instead .
> >
> > Just a quick heads-up, I'm cleaning this and the SPL up. I got SoCkit
> > booting from SD/MMC and I'm over 50 patches now. I'll submit them when
> > I'm done with this. I'd like to avoid merge conflicts now, so please
> > wait for my submission if possible.
>
> So you want me to wait regarding the SDRAM patches?
Hi,
yeah, I have some insane amount of cleanup patches and fixes already. I
will post them once I'm done. What I am sorely missing is the UniPHY
register interface documentation, it looks like that is not public, so
I don't exactly know if what sequencer.c does is really correct. Sometimes
I have serious doubts about that too . Can you give me the documentation
please ?
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-07-17 20:22 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 3:52 [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA dinguyen at opensource.altera.com
2015-06-03 3:52 ` [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller dinguyen at opensource.altera.com
2015-06-09 11:55 ` Pavel Machek
2015-06-09 12:58 ` Wolfgang Denk
2015-06-09 15:51 ` Dinh Nguyen
2015-06-22 9:38 ` Chin Liang See
2015-06-22 10:56 ` Pavel Machek
2015-06-03 3:52 ` [U-Boot] [PATCHv4 2/3] driver/ddr/altera: Add the sdram calibration portion dinguyen at opensource.altera.com
2015-06-09 12:21 ` Pavel Machek
2015-06-03 3:52 ` [U-Boot] [PATCHv4 3/3] arm: socfpga: enable the Altera SDRAM controller driver dinguyen at opensource.altera.com
2015-06-09 12:25 ` Pavel Machek
2015-06-26 16:43 ` [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA Marek Vasut
2015-06-26 20:01 ` Marek Vasut
2015-07-12 19:50 ` Marek Vasut
2015-07-17 19:58 ` Dinh Nguyen
2015-07-17 20:22 ` Marek Vasut [this message]
2015-07-18 23:51 ` Marek Vasut
2015-07-20 13:40 ` Dinh Nguyen
2015-07-20 18:36 ` Marek Vasut
2015-07-20 19:31 ` Dinh Nguyen
2015-07-20 19:40 ` Marek Vasut
2015-07-21 22:46 ` Dinh Nguyen
2015-07-22 3:24 ` Marek Vasut
2015-07-23 18:29 ` Dinh Nguyen
2015-07-24 3:57 ` Marek Vasut
2015-07-22 8:27 ` Dinh Nguyen
2015-07-22 9:00 ` Marek Vasut
2015-07-22 12:57 ` Dinh Nguyen
2015-07-22 13:01 ` Marek Vasut
2015-07-23 4:03 ` Dinh Nguyen
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