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From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 1/2] irqchip: imx-gpcv2: IMX GPCv2 driver for wakeup sources
Date: Tue, 28 Jul 2015 08:47:47 +0800	[thread overview]
Message-ID: <20150728004746.GT12927@tiger> (raw)
In-Reply-To: <CY1PR0301MB084351380311261C292872AB838E0@CY1PR0301MB0843.namprd03.prod.outlook.com>

On Mon, Jul 27, 2015 at 02:50:15PM +0000, Shenwei Wang wrote:
> The following structure is currently used in both drivers. The members "gpc_base/
> wakeup_sources/enabled_irqs" are now shared to PM driver. And the macro IMR_NUM
> will be referred by both drivers too.
>  
> struct imx_gpcv2_irq {
> 	spinlock_t lock;
> 	void __iomem *gpc_base;

So this is the virtual base used by both irqchip and pm driver, and the
lock is for register access protection, right?  If so, we can define gpc
as a syscon device, and access it from both drivers with regmap.

> 	u32 wakeup_sources[IMR_NUM];

This should be an irqchip internal data and exported to external users like
pm code with an interface like imx_gpcv2_get_wakeup_sources().

> 	u32 enabled_irqs[IMR_NUM];

I do not see how this is used in pm driver.

> 	u32 cpu2wakeup;

The only use of this in pm driver is to unmask interrupt #32 during
initialization.  Why cannot it be done in irqchip driver initialization?

Shawn

> };

WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Shenwei Wang <Shenwei.Wang@freescale.com>
Cc: "jason@lakedaemon.net" <jason@lakedaemon.net>,
	Huang Anson <Anson.Huang@freescale.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"shawn.guo@linaro.org" <shawn.guo@linaro.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v6 1/2] irqchip: imx-gpcv2: IMX GPCv2 driver for wakeup sources
Date: Tue, 28 Jul 2015 08:47:47 +0800	[thread overview]
Message-ID: <20150728004746.GT12927@tiger> (raw)
In-Reply-To: <CY1PR0301MB084351380311261C292872AB838E0@CY1PR0301MB0843.namprd03.prod.outlook.com>

On Mon, Jul 27, 2015 at 02:50:15PM +0000, Shenwei Wang wrote:
> The following structure is currently used in both drivers. The members "gpc_base/
> wakeup_sources/enabled_irqs" are now shared to PM driver. And the macro IMR_NUM
> will be referred by both drivers too.
>  
> struct imx_gpcv2_irq {
> 	spinlock_t lock;
> 	void __iomem *gpc_base;

So this is the virtual base used by both irqchip and pm driver, and the
lock is for register access protection, right?  If so, we can define gpc
as a syscon device, and access it from both drivers with regmap.

> 	u32 wakeup_sources[IMR_NUM];

This should be an irqchip internal data and exported to external users like
pm code with an interface like imx_gpcv2_get_wakeup_sources().

> 	u32 enabled_irqs[IMR_NUM];

I do not see how this is used in pm driver.

> 	u32 cpu2wakeup;

The only use of this in pm driver is to unmask interrupt #32 during
initialization.  Why cannot it be done in irqchip driver initialization?

Shawn

> };

  reply	other threads:[~2015-07-28  0:47 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-22 17:07 [PATCH v6 0/2] IMX GPCv2 drivers for wakeup source and suspend Shenwei Wang
2015-07-22 17:07 ` Shenwei Wang
2015-07-22 17:07 ` [PATCH v6 1/2] irqchip: imx-gpcv2: IMX GPCv2 driver for wakeup sources Shenwei Wang
2015-07-22 17:07   ` Shenwei Wang
2015-07-26 11:48   ` Thomas Gleixner
2015-07-26 11:48     ` Thomas Gleixner
2015-07-27 13:58     ` Shenwei Wang
2015-07-27 13:58       ` Shenwei Wang
2015-07-27 13:40   ` Shawn Guo
2015-07-27 13:40     ` Shawn Guo
2015-07-27 14:13     ` Shenwei Wang
2015-07-27 14:13       ` Shenwei Wang
2015-07-27 14:35       ` Shawn Guo
2015-07-27 14:35         ` Shawn Guo
2015-07-27 14:50         ` Shenwei Wang
2015-07-27 14:50           ` Shenwei Wang
2015-07-28  0:47           ` Shawn Guo [this message]
2015-07-28  0:47             ` Shawn Guo
2015-07-28 14:24             ` Shenwei Wang
2015-07-28 14:24               ` Shenwei Wang
2015-07-22 17:07 ` [PATCH v6 2/2] ARM: imx: Add suspend codes for imx7D Shenwei Wang
2015-07-22 17:07   ` Shenwei Wang
2015-07-27 13:28   ` Shawn Guo
2015-07-27 13:28     ` Shawn Guo
2015-07-27 18:24     ` Shenwei Wang
2015-07-27 18:24       ` Shenwei Wang
2015-07-28  1:02       ` Shawn Guo
2015-07-28  1:02         ` Shawn Guo
2015-07-28 14:16         ` Shenwei Wang
2015-07-28 14:16           ` Shenwei Wang
2015-07-28 14:30           ` Shawn Guo
2015-07-28 14:30             ` Shawn Guo
2015-07-28 15:14             ` Shenwei Wang
2015-07-28 15:14               ` Shenwei Wang
2015-07-28 16:39             ` Zhi Li
2015-07-28 16:39               ` Zhi Li

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