From: Vinod Koul <vinod.koul@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: liam.r.girdwood@linux.intel.com, patches.audio@intel.com,
alsa-devel@alsa-project.org, Jeeja KP <jeeja.kp@intel.com>
Subject: Re: [PATCH 3/6] ASoC: Intel: Skylake: Add functions for DSP module configuration
Date: Thu, 30 Jul 2015 08:45:07 +0530 [thread overview]
Message-ID: <20150730031507.GI29916@localhost> (raw)
In-Reply-To: <20150729175631.GK11162@sirena.org.uk>
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On Wed, Jul 29, 2015 at 06:56:31PM +0100, Mark Brown wrote:
> On Wed, Jul 29, 2015 at 10:20:29PM +0530, Vinod Koul wrote:
> > On Wed, Jul 29, 2015 at 01:33:23PM +0100, Mark Brown wrote:
>
> > > > +static int skl_alloc_queue(struct skl_module_pin *mpin,
> > > > + struct skl_module_inst_id id, int max)
> > > > +{
> > > > + struct skl_module_pin m_pin = skl_get_queue(mpin, id, max);
> > > > +
> > > > + if (m_pin.pin_index < 0)
> > > > + return -EINVAL;
> > > > +
> > > > + if (m_pin.is_dynamic) {
> > > > + m_pin.in_use = true;
> > > > + m_pin.id.module_id = id.module_id;
> > > > + m_pin.id.instance_id = id.instance_id;
> > > > + }
>
> > > Double indentation here. It's really unclear to me why a static pin
> > > doesn't need to get merked as in use?
>
> > Oops, will fix
>
> > In static pin case, the pins come from topology binary where these are fixed
> > for a configuration, so don't need to be allocated thus marked and hence
> > freed.
>
> But isn't this also protecting against attempts to use the resource
> multiple times within the configuration (or shouldn't we be doing that)?
In case of static since a module pin is allocated while designing
topology we shouldn't have clash as per design of topology
For example I have a Gain module connected to Mixer. Gain module pin 0 will
be allocated to connect to Mixer Pin0. I wont assign Pin0 to any other
module if I am doing static mapping.
Whereas in dynamic we will check for first free pin and allocate.
If all the pins has same meaning then dynamic would make sense, but non
linear modules need reference signals so they have special pins so we need
both approaches here
> Please bear in mind that this stuff has basically zero documentation or
> explanation so I'm kind of guessing as to what this is supposed to do.
I did try to add explanation where I felt was missing, but yes this is good
feedback, I will add more bits in next rev. Also please do point out where
you feel we missed.
Thanks
--
~Vinod
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next prev parent reply other threads:[~2015-07-30 3:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-21 18:23 [PATCH 0/6] ASoC: Intel: Skylake: Add DSP management routines Vinod Koul
2015-07-21 18:23 ` [PATCH 1/6] ASoC: Intel: Skylake: Add NHLT support to get BE config Vinod Koul
2015-07-23 16:41 ` Applied "ASoC: Intel: Skylake: Add NHLT support to get BE config" to the asoc tree Mark Brown
2015-07-21 18:23 ` [PATCH 2/6] ASoC: Intel: Skylake: Add dsp and ipc init helpers Vinod Koul
2015-07-23 16:41 ` Applied "ASoC: Intel: Skylake: Add dsp and ipc init helpers" to the asoc tree Mark Brown
2015-07-21 18:23 ` [PATCH 3/6] ASoC: Intel: Skylake: Add functions for DSP module configuration Vinod Koul
2015-07-29 12:33 ` Mark Brown
2015-07-29 16:50 ` Vinod Koul
2015-07-29 17:56 ` Mark Brown
2015-07-30 3:15 ` Vinod Koul [this message]
2015-07-30 19:01 ` Mark Brown
2015-07-31 4:53 ` Vinod Koul
2015-07-31 18:09 ` Mark Brown
2015-08-01 12:50 ` Vinod Koul
2015-07-21 18:23 ` [PATCH 4/6] ASoC: Intel: Skylake: Add helpers for SRC and converter modules Vinod Koul
2015-07-21 18:23 ` [PATCH 5/6] ASoC: Intel: Skylake: Add DSP module init and binding routines Vinod Koul
2015-07-29 12:35 ` Mark Brown
2015-07-29 16:55 ` Vinod Koul
2015-07-21 18:24 ` [PATCH 6/6] ASoC: Intel: Skylake: Add pipe management helpers Vinod Koul
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