* [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-22 9:39 ` Jisheng Zhang
0 siblings, 0 replies; 20+ messages in thread
From: Jisheng Zhang @ 2015-07-22 9:39 UTC (permalink / raw)
To: catalin.marinas, will.deacon, khilman, arnd, olof, mark.rutland,
sudeep.holla, robh+dt, galak, pawel.moll
Cc: linux-arm-kernel, linux-kernel, devicetree, Jisheng Zhang
Add initial dtsi file to support Marvell Berlin4CT SoC with
quad Cortex-A53 CPUs.
It also adds dts file for Marvell Berlin4CT DMP board which is
based on Berlin4CT SoC.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/marvell/Makefile | 5 +
arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts | 66 +++++++++++
arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 164 ++++++++++++++++++++++++++
4 files changed, 236 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/Makefile
create mode 100644 arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
create mode 100644 arch/arm64/boot/dts/marvell/berlin4ct.dtsi
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 0c57290..61e9493 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -5,6 +5,7 @@ dts-dirs += cavium
dts-dirs += exynos
dts-dirs += freescale
dts-dirs += hisilicon
+dts-dirs += marvell
dts-dirs += mediatek
dts-dirs += qcom
dts-dirs += rockchip
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
new file mode 100644
index 0000000..e2f6afa
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
+
+always := $(dtb-y)
+subdir-y := $(dts-dirs)
+clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
new file mode 100644
index 0000000..d1152c0
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015 Marvell Technology Group Ltd.
+ *
+ * Author: Jisheng Zhang <jszhang@marvell.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "berlin4ct.dtsi"
+
+/ {
+ model = "MARVELL BG4CT DMP BOARD";
+ compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ /* the first 16MB is for firmwares's usage */
+ reg = <0 0x01000000 0 0x80000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
new file mode 100644
index 0000000..becaedc
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2015 Marvell Technology Group Ltd.
+ *
+ * Author: Jisheng Zhang <jszhang@marvell.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "marvell,berlin";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x1>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>,
+ <&cpu1>,
+ <&cpu2>,
+ <&cpu3>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xf7000000 0x1000000>;
+
+ osc: osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ gic: interrupt-controller@901000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x901000 0x1000>,
+ <0x902000 0x2000>,
+ <0x904000 0x2000>,
+ <0x906000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ apb@fc0000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfc0000 0x10000>;
+ interrupt-parent = <&sic>;
+
+ sic: interrupt-controller@1000 {
+ compatible = "snps,dw-apb-ictl";
+ reg = <0x1000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ uart0: uart@d000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0xd000 0x100>;
+ interrupts = <8>;
+ clocks = <&osc>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+ };
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-22 9:39 ` Jisheng Zhang
0 siblings, 0 replies; 20+ messages in thread
From: Jisheng Zhang @ 2015-07-22 9:39 UTC (permalink / raw)
To: catalin.marinas, will.deacon, khilman, arnd, olof, mark.rutland,
sudeep.holla, robh+dt, galak, pawel.moll
Cc: linux-arm-kernel, linux-kernel, devicetree, Jisheng Zhang
Add initial dtsi file to support Marvell Berlin4CT SoC with
quad Cortex-A53 CPUs.
It also adds dts file for Marvell Berlin4CT DMP board which is
based on Berlin4CT SoC.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/marvell/Makefile | 5 +
arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts | 66 +++++++++++
arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 164 ++++++++++++++++++++++++++
4 files changed, 236 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/Makefile
create mode 100644 arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
create mode 100644 arch/arm64/boot/dts/marvell/berlin4ct.dtsi
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 0c57290..61e9493 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -5,6 +5,7 @@ dts-dirs += cavium
dts-dirs += exynos
dts-dirs += freescale
dts-dirs += hisilicon
+dts-dirs += marvell
dts-dirs += mediatek
dts-dirs += qcom
dts-dirs += rockchip
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
new file mode 100644
index 0000000..e2f6afa
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
+
+always := $(dtb-y)
+subdir-y := $(dts-dirs)
+clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
new file mode 100644
index 0000000..d1152c0
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015 Marvell Technology Group Ltd.
+ *
+ * Author: Jisheng Zhang <jszhang@marvell.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "berlin4ct.dtsi"
+
+/ {
+ model = "MARVELL BG4CT DMP BOARD";
+ compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ /* the first 16MB is for firmwares's usage */
+ reg = <0 0x01000000 0 0x80000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
new file mode 100644
index 0000000..becaedc
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2015 Marvell Technology Group Ltd.
+ *
+ * Author: Jisheng Zhang <jszhang@marvell.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "marvell,berlin";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x1>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>,
+ <&cpu1>,
+ <&cpu2>,
+ <&cpu3>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xf7000000 0x1000000>;
+
+ osc: osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ gic: interrupt-controller@901000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x901000 0x1000>,
+ <0x902000 0x2000>,
+ <0x904000 0x2000>,
+ <0x906000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ apb@fc0000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfc0000 0x10000>;
+ interrupt-parent = <&sic>;
+
+ sic: interrupt-controller@1000 {
+ compatible = "snps,dw-apb-ictl";
+ reg = <0x1000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ uart0: uart@d000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0xd000 0x100>;
+ interrupts = <8>;
+ clocks = <&osc>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+ };
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-30 8:06 ` Sebastian Hesselbarth
0 siblings, 0 replies; 20+ messages in thread
From: Sebastian Hesselbarth @ 2015-07-30 8:06 UTC (permalink / raw)
To: linux-arm-kernel
On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
> Add initial dtsi file to support Marvell Berlin4CT SoC with
> quad Cortex-A53 CPUs.
>
> It also adds dts file for Marvell Berlin4CT DMP board which is
> based on Berlin4CT SoC.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
[...]
> diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> new file mode 100644
> index 0000000..d1152c0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> @@ -0,0 +1,66 @@
> +/*
> + * Copyright (C) 2015 Marvell Technology Group Ltd.
> + *
> + * Author: Jisheng Zhang <jszhang@marvell.com>
[...]
> +/ {
Jisheng,
before I take this series, some nitpicking.
> + model = "MARVELL BG4CT DMP BOARD";
Are you fine with fixing the broken CAPSLOCK key, i.e. make above
"Marvell BG4CT DMP board" ?
> + compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + /* the first 16MB is for firmwares's usage */
> + reg = <0 0x01000000 0 0x80000000>;
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> new file mode 100644
> index 0000000..becaedc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> @@ -0,0 +1,164 @@
> +/*
> + * Copyright (C) 2015 Marvell Technology Group Ltd.
> + *
> + * Author: Jisheng Zhang <jszhang@marvell.com>
[...]
> +
> +/ {
> + compatible = "marvell,berlin";
compatible = "marvell,berlin4ct", "marvell,berlin";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
[...]
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xf7000000 0x1000000>;
> +
> + osc: osc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
Is the oscillator above really part of the SoC bus fabric? If 25MHz is
the only option for an external OSC, I suggest to move it at least out
of the soc {} node.
Sebastian
> + gic: interrupt-controller at 901000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x901000 0x1000>,
> + <0x902000 0x2000>,
> + <0x904000 0x2000>,
> + <0x906000 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + apb at fc0000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0xfc0000 0x10000>;
> + interrupt-parent = <&sic>;
> +
> + sic: interrupt-controller at 1000 {
> + compatible = "snps,dw-apb-ictl";
> + reg = <0x1000 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + uart0: uart at d000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0xd000 0x100>;
> + interrupts = <8>;
> + clocks = <&osc>;
> + reg-shift = <2>;
> + status = "disabled";
> + };
> + };
> + };
> +};
>
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-30 8:06 ` Sebastian Hesselbarth
0 siblings, 0 replies; 20+ messages in thread
From: Sebastian Hesselbarth @ 2015-07-30 8:06 UTC (permalink / raw)
To: Jisheng Zhang, catalin.marinas, will.deacon, khilman, arnd, olof,
mark.rutland, sudeep.holla, robh+dt, galak, pawel.moll
Cc: linux-arm-kernel, linux-kernel, devicetree
On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
> Add initial dtsi file to support Marvell Berlin4CT SoC with
> quad Cortex-A53 CPUs.
>
> It also adds dts file for Marvell Berlin4CT DMP board which is
> based on Berlin4CT SoC.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
[...]
> diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> new file mode 100644
> index 0000000..d1152c0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> @@ -0,0 +1,66 @@
> +/*
> + * Copyright (C) 2015 Marvell Technology Group Ltd.
> + *
> + * Author: Jisheng Zhang <jszhang@marvell.com>
[...]
> +/ {
Jisheng,
before I take this series, some nitpicking.
> + model = "MARVELL BG4CT DMP BOARD";
Are you fine with fixing the broken CAPSLOCK key, i.e. make above
"Marvell BG4CT DMP board" ?
> + compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + /* the first 16MB is for firmwares's usage */
> + reg = <0 0x01000000 0 0x80000000>;
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> new file mode 100644
> index 0000000..becaedc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> @@ -0,0 +1,164 @@
> +/*
> + * Copyright (C) 2015 Marvell Technology Group Ltd.
> + *
> + * Author: Jisheng Zhang <jszhang@marvell.com>
[...]
> +
> +/ {
> + compatible = "marvell,berlin";
compatible = "marvell,berlin4ct", "marvell,berlin";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
[...]
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xf7000000 0x1000000>;
> +
> + osc: osc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
Is the oscillator above really part of the SoC bus fabric? If 25MHz is
the only option for an external OSC, I suggest to move it at least out
of the soc {} node.
Sebastian
> + gic: interrupt-controller@901000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x901000 0x1000>,
> + <0x902000 0x2000>,
> + <0x904000 0x2000>,
> + <0x906000 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + apb@fc0000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0xfc0000 0x10000>;
> + interrupt-parent = <&sic>;
> +
> + sic: interrupt-controller@1000 {
> + compatible = "snps,dw-apb-ictl";
> + reg = <0x1000 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + uart0: uart@d000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0xd000 0x100>;
> + interrupts = <8>;
> + clocks = <&osc>;
> + reg-shift = <2>;
> + status = "disabled";
> + };
> + };
> + };
> +};
>
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-30 8:06 ` Sebastian Hesselbarth
0 siblings, 0 replies; 20+ messages in thread
From: Sebastian Hesselbarth @ 2015-07-30 8:06 UTC (permalink / raw)
To: Jisheng Zhang, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, khilman-QSEj5FYQhm4dnm+yROfE0A,
arnd-r2nGTMty4D4, olof-nZhT3qVonbNeoWH0uzbU5w,
mark.rutland-5wv7dgnIgG8, sudeep.holla-5wv7dgnIgG8,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, galak-sgV2jX0FEOL9JmXXK+q4OQ,
pawel.moll-5wv7dgnIgG8
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
> Add initial dtsi file to support Marvell Berlin4CT SoC with
> quad Cortex-A53 CPUs.
>
> It also adds dts file for Marvell Berlin4CT DMP board which is
> based on Berlin4CT SoC.
>
> Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> ---
[...]
> diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> new file mode 100644
> index 0000000..d1152c0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> @@ -0,0 +1,66 @@
> +/*
> + * Copyright (C) 2015 Marvell Technology Group Ltd.
> + *
> + * Author: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
[...]
> +/ {
Jisheng,
before I take this series, some nitpicking.
> + model = "MARVELL BG4CT DMP BOARD";
Are you fine with fixing the broken CAPSLOCK key, i.e. make above
"Marvell BG4CT DMP board" ?
> + compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + /* the first 16MB is for firmwares's usage */
> + reg = <0 0x01000000 0 0x80000000>;
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> new file mode 100644
> index 0000000..becaedc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> @@ -0,0 +1,164 @@
> +/*
> + * Copyright (C) 2015 Marvell Technology Group Ltd.
> + *
> + * Author: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
[...]
> +
> +/ {
> + compatible = "marvell,berlin";
compatible = "marvell,berlin4ct", "marvell,berlin";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
[...]
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xf7000000 0x1000000>;
> +
> + osc: osc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
Is the oscillator above really part of the SoC bus fabric? If 25MHz is
the only option for an external OSC, I suggest to move it at least out
of the soc {} node.
Sebastian
> + gic: interrupt-controller@901000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x901000 0x1000>,
> + <0x902000 0x2000>,
> + <0x904000 0x2000>,
> + <0x906000 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + apb@fc0000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0xfc0000 0x10000>;
> + interrupt-parent = <&sic>;
> +
> + sic: interrupt-controller@1000 {
> + compatible = "snps,dw-apb-ictl";
> + reg = <0x1000 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + uart0: uart@d000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0xd000 0x100>;
> + interrupts = <8>;
> + clocks = <&osc>;
> + reg-shift = <2>;
> + status = "disabled";
> + };
> + };
> + };
> +};
>
--
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^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-30 8:24 ` Jisheng Zhang
0 siblings, 0 replies; 20+ messages in thread
From: Jisheng Zhang @ 2015-07-30 8:24 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 30 Jul 2015 10:06:38 +0200
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
> > Add initial dtsi file to support Marvell Berlin4CT SoC with
> > quad Cortex-A53 CPUs.
> >
> > It also adds dts file for Marvell Berlin4CT DMP board which is
> > based on Berlin4CT SoC.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > ---
> [...]
> > diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> > new file mode 100644
> > index 0000000..d1152c0
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> > @@ -0,0 +1,66 @@
> > +/*
> > + * Copyright (C) 2015 Marvell Technology Group Ltd.
> > + *
> > + * Author: Jisheng Zhang <jszhang@marvell.com>
> [...]
> > +/ {
>
> Jisheng,
>
> before I take this series, some nitpicking.
>
> > + model = "MARVELL BG4CT DMP BOARD";
>
> Are you fine with fixing the broken CAPSLOCK key, i.e. make above
> "Marvell BG4CT DMP board" ?
It doesn't matter, will do in newer version.
>
> > + compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + /* the first 16MB is for firmwares's usage */
> > + reg = <0 0x01000000 0 0x80000000>;
> > + };
> > +};
> > +
> > +&uart0 {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> > new file mode 100644
> > index 0000000..becaedc
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> > @@ -0,0 +1,164 @@
> > +/*
> > + * Copyright (C) 2015 Marvell Technology Group Ltd.
> > + *
> > + * Author: Jisheng Zhang <jszhang@marvell.com>
> [...]
> > +
> > +/ {
> > + compatible = "marvell,berlin";
>
> compatible = "marvell,berlin4ct", "marvell,berlin";
Thanks for pointing this out.
>
> > + interrupt-parent = <&gic>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> [...]
> > + soc {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0 0xf7000000 0x1000000>;
> > +
> > + osc: osc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <25000000>;
> > + };
>
> Is the oscillator above really part of the SoC bus fabric? If 25MHz is
No. it's not part of SoC bus.
> the only option for an external OSC, I suggest to move it at least out
> of the soc {} node.
Good idea.
Thanks for the review,
Jisheng
>
> Sebastian
>
> > + gic: interrupt-controller at 901000 {
> > + compatible = "arm,gic-400";
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + reg = <0x901000 0x1000>,
> > + <0x902000 0x2000>,
> > + <0x904000 0x2000>,
> > + <0x906000 0x2000>;
> > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> > + };
> > +
> > + apb at fc0000 {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0xfc0000 0x10000>;
> > + interrupt-parent = <&sic>;
> > +
> > + sic: interrupt-controller at 1000 {
> > + compatible = "snps,dw-apb-ictl";
> > + reg = <0x1000 0x30>;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + interrupt-parent = <&gic>;
> > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + uart0: uart at d000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0xd000 0x100>;
> > + interrupts = <8>;
> > + clocks = <&osc>;
> > + reg-shift = <2>;
> > + status = "disabled";
> > + };
> > + };
> > + };
> > +};
> >
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-30 8:24 ` Jisheng Zhang
0 siblings, 0 replies; 20+ messages in thread
From: Jisheng Zhang @ 2015-07-30 8:24 UTC (permalink / raw)
To: Sebastian Hesselbarth
Cc: catalin.marinas, will.deacon, khilman, arnd, olof, mark.rutland,
sudeep.holla, robh+dt, galak, pawel.moll, linux-arm-kernel,
linux-kernel, devicetree
On Thu, 30 Jul 2015 10:06:38 +0200
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
> > Add initial dtsi file to support Marvell Berlin4CT SoC with
> > quad Cortex-A53 CPUs.
> >
> > It also adds dts file for Marvell Berlin4CT DMP board which is
> > based on Berlin4CT SoC.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > ---
> [...]
> > diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> > new file mode 100644
> > index 0000000..d1152c0
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> > @@ -0,0 +1,66 @@
> > +/*
> > + * Copyright (C) 2015 Marvell Technology Group Ltd.
> > + *
> > + * Author: Jisheng Zhang <jszhang@marvell.com>
> [...]
> > +/ {
>
> Jisheng,
>
> before I take this series, some nitpicking.
>
> > + model = "MARVELL BG4CT DMP BOARD";
>
> Are you fine with fixing the broken CAPSLOCK key, i.e. make above
> "Marvell BG4CT DMP board" ?
It doesn't matter, will do in newer version.
>
> > + compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + /* the first 16MB is for firmwares's usage */
> > + reg = <0 0x01000000 0 0x80000000>;
> > + };
> > +};
> > +
> > +&uart0 {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> > new file mode 100644
> > index 0000000..becaedc
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> > @@ -0,0 +1,164 @@
> > +/*
> > + * Copyright (C) 2015 Marvell Technology Group Ltd.
> > + *
> > + * Author: Jisheng Zhang <jszhang@marvell.com>
> [...]
> > +
> > +/ {
> > + compatible = "marvell,berlin";
>
> compatible = "marvell,berlin4ct", "marvell,berlin";
Thanks for pointing this out.
>
> > + interrupt-parent = <&gic>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> [...]
> > + soc {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0 0xf7000000 0x1000000>;
> > +
> > + osc: osc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <25000000>;
> > + };
>
> Is the oscillator above really part of the SoC bus fabric? If 25MHz is
No. it's not part of SoC bus.
> the only option for an external OSC, I suggest to move it at least out
> of the soc {} node.
Good idea.
Thanks for the review,
Jisheng
>
> Sebastian
>
> > + gic: interrupt-controller@901000 {
> > + compatible = "arm,gic-400";
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + reg = <0x901000 0x1000>,
> > + <0x902000 0x2000>,
> > + <0x904000 0x2000>,
> > + <0x906000 0x2000>;
> > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> > + };
> > +
> > + apb@fc0000 {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0xfc0000 0x10000>;
> > + interrupt-parent = <&sic>;
> > +
> > + sic: interrupt-controller@1000 {
> > + compatible = "snps,dw-apb-ictl";
> > + reg = <0x1000 0x30>;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + interrupt-parent = <&gic>;
> > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + uart0: uart@d000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0xd000 0x100>;
> > + interrupts = <8>;
> > + clocks = <&osc>;
> > + reg-shift = <2>;
> > + status = "disabled";
> > + };
> > + };
> > + };
> > +};
> >
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v4 1/2] arm64: dts: Add dts files for Marvell Berlin4CT SoC
@ 2015-07-30 8:24 ` Jisheng Zhang
0 siblings, 0 replies; 20+ messages in thread
From: Jisheng Zhang @ 2015-07-30 8:24 UTC (permalink / raw)
To: Sebastian Hesselbarth
Cc: catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
khilman-QSEj5FYQhm4dnm+yROfE0A, arnd-r2nGTMty4D4,
olof-nZhT3qVonbNeoWH0uzbU5w, mark.rutland-5wv7dgnIgG8,
sudeep.holla-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
galak-sgV2jX0FEOL9JmXXK+q4OQ, pawel.moll-5wv7dgnIgG8,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
On Thu, 30 Jul 2015 10:06:38 +0200
Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
> > Add initial dtsi file to support Marvell Berlin4CT SoC with
> > quad Cortex-A53 CPUs.
> >
> > It also adds dts file for Marvell Berlin4CT DMP board which is
> > based on Berlin4CT SoC.
> >
> > Signed-off-by: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> > ---
> [...]
> > diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> > new file mode 100644
> > index 0000000..d1152c0
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/marvell/berlin4ct-dmp.dts
> > @@ -0,0 +1,66 @@
> > +/*
> > + * Copyright (C) 2015 Marvell Technology Group Ltd.
> > + *
> > + * Author: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> [...]
> > +/ {
>
> Jisheng,
>
> before I take this series, some nitpicking.
>
> > + model = "MARVELL BG4CT DMP BOARD";
>
> Are you fine with fixing the broken CAPSLOCK key, i.e. make above
> "Marvell BG4CT DMP board" ?
It doesn't matter, will do in newer version.
>
> > + compatible = "marvell,berlin4ct-dmp", "marvell,berlin4ct", "marvell,berlin";
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + /* the first 16MB is for firmwares's usage */
> > + reg = <0 0x01000000 0 0x80000000>;
> > + };
> > +};
> > +
> > +&uart0 {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> > new file mode 100644
> > index 0000000..becaedc
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
> > @@ -0,0 +1,164 @@
> > +/*
> > + * Copyright (C) 2015 Marvell Technology Group Ltd.
> > + *
> > + * Author: Jisheng Zhang <jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> [...]
> > +
> > +/ {
> > + compatible = "marvell,berlin";
>
> compatible = "marvell,berlin4ct", "marvell,berlin";
Thanks for pointing this out.
>
> > + interrupt-parent = <&gic>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> [...]
> > + soc {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0 0xf7000000 0x1000000>;
> > +
> > + osc: osc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <25000000>;
> > + };
>
> Is the oscillator above really part of the SoC bus fabric? If 25MHz is
No. it's not part of SoC bus.
> the only option for an external OSC, I suggest to move it at least out
> of the soc {} node.
Good idea.
Thanks for the review,
Jisheng
>
> Sebastian
>
> > + gic: interrupt-controller@901000 {
> > + compatible = "arm,gic-400";
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + reg = <0x901000 0x1000>,
> > + <0x902000 0x2000>,
> > + <0x904000 0x2000>,
> > + <0x906000 0x2000>;
> > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> > + };
> > +
> > + apb@fc0000 {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0xfc0000 0x10000>;
> > + interrupt-parent = <&sic>;
> > +
> > + sic: interrupt-controller@1000 {
> > + compatible = "snps,dw-apb-ictl";
> > + reg = <0x1000 0x30>;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + interrupt-parent = <&gic>;
> > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + uart0: uart@d000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0xd000 0x100>;
> > + interrupts = <8>;
> > + clocks = <&osc>;
> > + reg-shift = <2>;
> > + status = "disabled";
> > + };
> > + };
> > + };
> > +};
> >
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