From: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
To: Stuart Yoder
<stuart.yoder-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
Marc Zyngier <Marc.Zyngier-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>
Cc: "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Lorenzo Pieralisi
<Lorenzo.Pieralisi-5wv7dgnIgG8@public.gmane.org>,
"arnd-r2nGTMty4D4@public.gmane.org"
<arnd-r2nGTMty4D4@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"ddaney-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org"
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<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
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<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>,
"thunder.leizhen-hv44wF8Li93QT0dZR+AlfA@public.gmane.org"
<thunder.leizhen-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
"treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org"
<treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"majun258-hv44wF8Li93QT0dZR+AlfA@public.gmane.org"
<majun258-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH 2/3] Docs: dt: Add PCI MSI map bindings
Date: Thu, 6 Aug 2015 19:14:53 +0100 [thread overview]
Message-ID: <20150806181453.GD6437@leverpostej> (raw)
In-Reply-To: <CY1PR0301MB07486794749E499F71BDFCD287750-YrwGdl+PljkyhdUd3pz1uJwN6zqB+hSMnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
[...]
> > +PCI root complex
> > +================
> > +
> > +Optional properties
> > +-------------------
> > +
> > +- msi-map: Maps a Requester ID to an MSI controller and associated
> > + msi-specifier data. The property is an arbitrary number of tuples of
> > + (rid-base,msi-controller,msi-base,length), where:
> > +
> > + * rid-base is a single cell describing the first RID matched by the entry.
> > +
> > + * msi-controller is a single phandle to an MSI controller
> > +
> > + * msi-base is an msi-specifier describing the msi-specifier produced for the
> > + first RID matched by the entry.
> > +
> > + * length is a single cell describing how many consecutive RIDs are matched
> > + following the rid-base.
> > +
> > + Any RID r in the interval [rid-base, rid-base + length) is associated with
> > + the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
> > +
> > +- msi-map-mask: A mask to be applied to each Requester ID prior to being mapped
> > + to an msi-specifier per the msi-map property.
>
> Can we extend the msi-map-mask definition to say: "A mask value of 0x0 is valid
> and indicates that no RIDs are _currently_ mapped to any msi-specifier."
That would break a valid case of the mask being all zeroes.
Consider the case that all RIDs get mapped to a single msi-specifier;
the obvious way to write that is:
msi-map-mask = <0x0000>;
msi-map = <0x0000 &msi (msi-specifier) 1>;
In this case all RIDS are always mapped to the single msi-specifier.
> We have an SoC with a programmable hardware table in the PCI controller that maps
> requester ID to stream ID, so the overall msi-map (and iommu-map) definition fit
> into that scheme. But, we would like to be able make the RID->stream-ID mapping
> decision _lazily_, in Linux, based on actual usage of PCI devices.
Dynamically programming the mapping is at odds to this binding. I don't
see how that can fit.
Why can the RID->SID mapping not be statically configured prior to
entering the OS?
Thanks,
Mark.
WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] Docs: dt: Add PCI MSI map bindings
Date: Thu, 6 Aug 2015 19:14:53 +0100 [thread overview]
Message-ID: <20150806181453.GD6437@leverpostej> (raw)
In-Reply-To: <CY1PR0301MB07486794749E499F71BDFCD287750@CY1PR0301MB0748.namprd03.prod.outlook.com>
[...]
> > +PCI root complex
> > +================
> > +
> > +Optional properties
> > +-------------------
> > +
> > +- msi-map: Maps a Requester ID to an MSI controller and associated
> > + msi-specifier data. The property is an arbitrary number of tuples of
> > + (rid-base,msi-controller,msi-base,length), where:
> > +
> > + * rid-base is a single cell describing the first RID matched by the entry.
> > +
> > + * msi-controller is a single phandle to an MSI controller
> > +
> > + * msi-base is an msi-specifier describing the msi-specifier produced for the
> > + first RID matched by the entry.
> > +
> > + * length is a single cell describing how many consecutive RIDs are matched
> > + following the rid-base.
> > +
> > + Any RID r in the interval [rid-base, rid-base + length) is associated with
> > + the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
> > +
> > +- msi-map-mask: A mask to be applied to each Requester ID prior to being mapped
> > + to an msi-specifier per the msi-map property.
>
> Can we extend the msi-map-mask definition to say: "A mask value of 0x0 is valid
> and indicates that no RIDs are _currently_ mapped to any msi-specifier."
That would break a valid case of the mask being all zeroes.
Consider the case that all RIDs get mapped to a single msi-specifier;
the obvious way to write that is:
msi-map-mask = <0x0000>;
msi-map = <0x0000 &msi (msi-specifier) 1>;
In this case all RIDS are always mapped to the single msi-specifier.
> We have an SoC with a programmable hardware table in the PCI controller that maps
> requester ID to stream ID, so the overall msi-map (and iommu-map) definition fit
> into that scheme. But, we would like to be able make the RID->stream-ID mapping
> decision _lazily_, in Linux, based on actual usage of PCI devices.
Dynamically programming the mapping is at odds to this binding. I don't
see how that can fit.
Why can the RID->SID mapping not be statically configured prior to
entering the OS?
Thanks,
Mark.
WARNING: multiple messages have this Message-ID (diff)
From: Mark Rutland <mark.rutland@arm.com>
To: Stuart Yoder <stuart.yoder@freescale.com>,
Marc Zyngier <Marc.Zyngier@arm.com>,
Will Deacon <Will.Deacon@arm.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
"arnd@arndb.de" <arnd@arndb.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"ddaney@caviumnetworks.com" <ddaney@caviumnetworks.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"tirumalesh.chalamarla@caviumnetworks.com"
<tirumalesh.chalamarla@caviumnetworks.com>,
"laurent.pinchart@ideasonboard.com"
<laurent.pinchart@ideasonboard.com>,
"thunder.leizhen@huawei.com" <thunder.leizhen@huawei.com>,
"treding@nvidia.com" <treding@nvidia.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"majun258@huawei.com" <majun258@huawei.com>
Subject: Re: [PATCH 2/3] Docs: dt: Add PCI MSI map bindings
Date: Thu, 6 Aug 2015 19:14:53 +0100 [thread overview]
Message-ID: <20150806181453.GD6437@leverpostej> (raw)
In-Reply-To: <CY1PR0301MB07486794749E499F71BDFCD287750@CY1PR0301MB0748.namprd03.prod.outlook.com>
[...]
> > +PCI root complex
> > +================
> > +
> > +Optional properties
> > +-------------------
> > +
> > +- msi-map: Maps a Requester ID to an MSI controller and associated
> > + msi-specifier data. The property is an arbitrary number of tuples of
> > + (rid-base,msi-controller,msi-base,length), where:
> > +
> > + * rid-base is a single cell describing the first RID matched by the entry.
> > +
> > + * msi-controller is a single phandle to an MSI controller
> > +
> > + * msi-base is an msi-specifier describing the msi-specifier produced for the
> > + first RID matched by the entry.
> > +
> > + * length is a single cell describing how many consecutive RIDs are matched
> > + following the rid-base.
> > +
> > + Any RID r in the interval [rid-base, rid-base + length) is associated with
> > + the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
> > +
> > +- msi-map-mask: A mask to be applied to each Requester ID prior to being mapped
> > + to an msi-specifier per the msi-map property.
>
> Can we extend the msi-map-mask definition to say: "A mask value of 0x0 is valid
> and indicates that no RIDs are _currently_ mapped to any msi-specifier."
That would break a valid case of the mask being all zeroes.
Consider the case that all RIDs get mapped to a single msi-specifier;
the obvious way to write that is:
msi-map-mask = <0x0000>;
msi-map = <0x0000 &msi (msi-specifier) 1>;
In this case all RIDS are always mapped to the single msi-specifier.
> We have an SoC with a programmable hardware table in the PCI controller that maps
> requester ID to stream ID, so the overall msi-map (and iommu-map) definition fit
> into that scheme. But, we would like to be able make the RID->stream-ID mapping
> decision _lazily_, in Linux, based on actual usage of PCI devices.
Dynamically programming the mapping is at odds to this binding. I don't
see how that can fit.
Why can the RID->SID mapping not be statically configured prior to
entering the OS?
Thanks,
Mark.
next prev parent reply other threads:[~2015-08-06 18:14 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-23 16:52 [PATCH 0/3] Generic PCI MSI + IOMMU topology bindings Mark Rutland
2015-07-23 16:52 ` Mark Rutland
2015-07-23 16:52 ` Mark Rutland
[not found] ` <1437670365-20704-1-git-send-email-mark.rutland-5wv7dgnIgG8@public.gmane.org>
2015-07-23 16:52 ` [PATCH 1/3] Docs: dt: add generic MSI bindings Mark Rutland
2015-07-23 16:52 ` Mark Rutland
2015-07-23 16:52 ` Mark Rutland
[not found] ` <1437670365-20704-2-git-send-email-mark.rutland-5wv7dgnIgG8@public.gmane.org>
2015-07-23 18:26 ` David Daney
2015-07-23 18:26 ` David Daney
2015-07-23 18:26 ` David Daney
2015-07-24 7:04 ` Marc Zyngier
2015-07-24 7:04 ` Marc Zyngier
2015-08-05 16:51 ` Mark Rutland
2015-08-05 16:51 ` Mark Rutland
2015-08-05 16:51 ` Mark Rutland
2015-08-06 7:56 ` Marc Zyngier
2015-08-06 7:56 ` Marc Zyngier
2015-08-06 7:56 ` Marc Zyngier
2015-08-24 10:17 ` Mark Rutland
2015-08-24 10:17 ` Mark Rutland
2015-08-24 10:17 ` Mark Rutland
2015-08-24 13:37 ` Rob Herring
2015-08-24 13:37 ` Rob Herring
2015-08-24 13:37 ` Rob Herring
[not found] ` <CAL_Jsq+-xKsfBwqjHnSKPxtO1muu-NLEHZTTLpSqw=sBuU1Gjw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-24 13:47 ` Mark Rutland
2015-08-24 13:47 ` Mark Rutland
2015-08-24 13:47 ` Mark Rutland
2015-07-27 8:02 ` Marc Zyngier
2015-07-27 8:02 ` Marc Zyngier
[not found] ` <55B5E5A6.2030509-5wv7dgnIgG8@public.gmane.org>
2015-07-27 9:46 ` Mark Rutland
2015-07-27 9:46 ` Mark Rutland
2015-07-27 9:46 ` Mark Rutland
2015-08-03 10:44 ` Marc Zyngier
2015-08-03 10:44 ` Marc Zyngier
2015-08-03 10:44 ` Marc Zyngier
2015-07-23 16:52 ` [PATCH 2/3] Docs: dt: Add PCI MSI map bindings Mark Rutland
2015-07-23 16:52 ` Mark Rutland
2015-07-23 16:52 ` Mark Rutland
[not found] ` <1437670365-20704-3-git-send-email-mark.rutland-5wv7dgnIgG8@public.gmane.org>
2015-07-24 23:27 ` Chalamarla, Tirumalesh
2015-07-24 23:27 ` Chalamarla, Tirumalesh
2015-07-24 23:27 ` Chalamarla, Tirumalesh
[not found] ` <FD9C4916-6BDC-40F2-A273-91BFBD3B0075-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2015-07-27 9:16 ` Mark Rutland
2015-07-27 9:16 ` Mark Rutland
2015-07-27 9:16 ` Mark Rutland
2015-07-27 8:16 ` Marc Zyngier
2015-07-27 8:16 ` Marc Zyngier
2015-07-27 8:16 ` Marc Zyngier
[not found] ` <55B5E8C1.4030707-5wv7dgnIgG8@public.gmane.org>
2015-09-04 22:33 ` David Daney
2015-09-04 22:33 ` David Daney
2015-09-04 22:33 ` David Daney
[not found] ` <55EA1C3F.1030300-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2015-09-07 18:05 ` Mark Rutland
2015-09-07 18:05 ` Mark Rutland
2015-09-07 18:05 ` Mark Rutland
2015-09-08 15:53 ` Stuart Yoder
2015-09-08 15:53 ` Stuart Yoder
2015-09-08 15:53 ` Stuart Yoder
2015-09-07 17:56 ` Mark Rutland
2015-09-07 17:56 ` Mark Rutland
2015-09-07 17:56 ` Mark Rutland
2015-08-05 16:39 ` Varun Sethi
2015-08-05 16:39 ` Varun Sethi
2015-08-05 16:39 ` Varun Sethi
[not found] ` <BN1PR0301MB06277FDA6EB34E77B557CA75EA750-RQSpjbwlmjSD1ymB6+i1+JwN6zqB+hSMnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2015-08-06 17:38 ` Mark Rutland
2015-08-06 17:38 ` Mark Rutland
2015-08-06 17:38 ` Mark Rutland
2015-08-08 15:06 ` Varun Sethi
2015-08-08 15:06 ` Varun Sethi
2015-08-08 15:06 ` Varun Sethi
[not found] ` <CALRxmdA32xiSX7DDKAJPLR8=bh_9j-6MN124u4KjYGRT8bAKNg@mail.gmail.com>
[not found] ` <CALRxmdA32xiSX7DDKAJPLR8=bh_9j-6MN124u4KjYGRT8bAKNg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-05 19:53 ` Stuart Yoder
2015-08-05 19:53 ` Stuart Yoder
2015-08-05 19:53 ` Stuart Yoder
[not found] ` <CY1PR0301MB07486794749E499F71BDFCD287750-YrwGdl+PljkyhdUd3pz1uJwN6zqB+hSMnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2015-08-06 18:14 ` Mark Rutland [this message]
2015-08-06 18:14 ` Mark Rutland
2015-08-06 18:14 ` Mark Rutland
2015-08-06 19:46 ` Stuart Yoder
2015-08-06 19:46 ` Stuart Yoder
2015-08-06 19:46 ` Stuart Yoder
2015-07-23 16:52 ` [PATCH 3/3] Docs: dt: add PCI IOMMU " Mark Rutland
2015-07-23 16:52 ` Mark Rutland
2015-07-23 16:52 ` Mark Rutland
[not found] ` <1437670365-20704-4-git-send-email-mark.rutland-5wv7dgnIgG8@public.gmane.org>
2015-07-24 12:23 ` Robin Murphy
2015-07-24 12:23 ` Robin Murphy
2015-07-24 12:23 ` Robin Murphy
[not found] ` <55B22E5B.7080208-5wv7dgnIgG8@public.gmane.org>
2015-07-24 13:26 ` Mark Rutland
2015-07-24 13:26 ` Mark Rutland
2015-07-24 13:26 ` Mark Rutland
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