From: Matthew Wilcox <willy@linux.intel.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-kernel@vger.kernel.org, axboe@kernel.dk, riel@redhat.com,
linux-nvdimm@lists.01.org, linux-mm@kvack.org, mgorman@suse.de,
torvalds@linux-foundation.org, hch@lst.de
Subject: Re: [PATCH v5 2/5] allow mapping page-less memremaped areas into KVA
Date: Thu, 13 Aug 2015 13:35:52 -0400 [thread overview]
Message-ID: <20150813173552.GA9645@linux.intel.com> (raw)
In-Reply-To: <20150813030109.36703.21738.stgit@otcpl-skl-sds-2.jf.intel.com>
On Wed, Aug 12, 2015 at 11:01:09PM -0400, Dan Williams wrote:
> +static inline __pfn_t page_to_pfn_t(struct page *page)
> +{
> + __pfn_t pfn = { .val = page_to_pfn(page) << PAGE_SHIFT, };
> +
> + return pfn;
> +}
static inline __pfn_t page_to_pfn_t(struct page *page)
{
__pfn_t __pfn;
unsigned long pfn = page_to_pfn(page);
BUG_ON(pfn > (-1UL >> PFN_SHIFT))
__pfn.val = pfn << PFN_SHIFT;
return __pfn;
}
I have a problem wih PFN_SHIFT being equal to PAGE_SHIFT. Consider a
32-bit kernel; you're asserting that no memory represented by a struct
page can have a physical address above 4GB.
You only need three bits for flags so far ... how about making PFN_SHIFT
be 6? That supports physical addresses up to 2^38 (256GB). That should
be enough, but hardware designers have done some strange things in the
past (I know that HP made PA-RISC hardware that can run 32-bit kernels
with memory between 64GB and 68GB, and they can't be the only strange
hardware people out there).
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WARNING: multiple messages have this Message-ID (diff)
From: Matthew Wilcox <willy@linux.intel.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-kernel@vger.kernel.org, axboe@kernel.dk, riel@redhat.com,
linux-nvdimm@ml01.01.org, linux-mm@kvack.org, mgorman@suse.de,
torvalds@linux-foundation.org, hch@lst.de
Subject: Re: [PATCH v5 2/5] allow mapping page-less memremaped areas into KVA
Date: Thu, 13 Aug 2015 13:35:52 -0400 [thread overview]
Message-ID: <20150813173552.GA9645@linux.intel.com> (raw)
In-Reply-To: <20150813030109.36703.21738.stgit@otcpl-skl-sds-2.jf.intel.com>
On Wed, Aug 12, 2015 at 11:01:09PM -0400, Dan Williams wrote:
> +static inline __pfn_t page_to_pfn_t(struct page *page)
> +{
> + __pfn_t pfn = { .val = page_to_pfn(page) << PAGE_SHIFT, };
> +
> + return pfn;
> +}
static inline __pfn_t page_to_pfn_t(struct page *page)
{
__pfn_t __pfn;
unsigned long pfn = page_to_pfn(page);
BUG_ON(pfn > (-1UL >> PFN_SHIFT))
__pfn.val = pfn << PFN_SHIFT;
return __pfn;
}
I have a problem wih PFN_SHIFT being equal to PAGE_SHIFT. Consider a
32-bit kernel; you're asserting that no memory represented by a struct
page can have a physical address above 4GB.
You only need three bits for flags so far ... how about making PFN_SHIFT
be 6? That supports physical addresses up to 2^38 (256GB). That should
be enough, but hardware designers have done some strange things in the
past (I know that HP made PA-RISC hardware that can run 32-bit kernels
with memory between 64GB and 68GB, and they can't be the only strange
hardware people out there).
next prev parent reply other threads:[~2015-08-13 17:35 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-13 3:00 [PATCH v5 0/5] introduce __pfn_t for unmapped pfn I/O and DAX lifetime Dan Williams
2015-08-13 3:00 ` Dan Williams
2015-08-13 3:01 ` [PATCH v5 1/5] mm: move __phys_to_pfn and __pfn_to_phys to asm/generic/memory_model.h Dan Williams
2015-08-13 3:01 ` Dan Williams
2015-08-13 3:01 ` [PATCH v5 2/5] allow mapping page-less memremaped areas into KVA Dan Williams
2015-08-13 3:01 ` Dan Williams
2015-08-13 5:58 ` Boaz Harrosh
2015-08-13 5:58 ` Boaz Harrosh
2015-08-13 12:57 ` Dan Williams
2015-08-13 12:57 ` Dan Williams
2015-08-13 13:23 ` Boaz Harrosh
2015-08-13 13:23 ` Boaz Harrosh
2015-08-13 14:41 ` Christoph Hellwig
2015-08-13 14:41 ` Christoph Hellwig
2015-08-13 15:01 ` Boaz Harrosh
2015-08-13 15:01 ` Boaz Harrosh
2015-08-13 14:37 ` Christoph Hellwig
2015-08-13 14:37 ` Christoph Hellwig
2015-08-13 14:48 ` Boaz Harrosh
2015-08-13 14:48 ` Boaz Harrosh
2015-08-13 15:29 ` Boaz Harrosh
2015-08-13 15:29 ` Boaz Harrosh
2015-08-13 17:37 ` Dave Hansen
2015-08-13 17:37 ` Dave Hansen
2015-08-13 17:35 ` Matthew Wilcox [this message]
2015-08-13 17:35 ` Matthew Wilcox
2015-08-13 18:15 ` Dan Williams
2015-08-13 18:15 ` Dan Williams
2015-08-13 3:01 ` [PATCH v5 3/5] dax: drop size parameter to ->direct_access() Dan Williams
2015-08-13 3:01 ` Dan Williams
2015-08-13 3:01 ` [PATCH v5 4/5] dax: fix mapping lifetime handling, convert to __pfn_t + kmap_atomic_pfn_t() Dan Williams
2015-08-13 3:01 ` Dan Williams
2015-08-13 6:26 ` Boaz Harrosh
2015-08-13 6:26 ` Boaz Harrosh
2015-08-13 15:21 ` Dan Williams
2015-08-13 15:21 ` Dan Williams
2015-08-13 16:34 ` Boaz Harrosh
2015-08-13 16:34 ` Boaz Harrosh
2015-08-13 18:51 ` Dan Williams
2015-08-13 18:51 ` Dan Williams
2015-08-13 3:01 ` [PATCH v5 5/5] scatterlist: convert to __pfn_t Dan Williams
2015-08-13 3:01 ` Dan Williams
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