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From: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Pi-Cheng Chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: "Rafael J. Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org>,
	Matthias Brugger
	<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Bartlomiej Zolnierkiewicz
	<b.zolnierkie-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linaro-kernel-cunTk1MwBs8s++Sfvej+rw@public.gmane.org,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v7 2/3] cpufreq: mediatek: Add MT8173 cpufreq driver
Date: Wed, 19 Aug 2015 11:11:20 +0530	[thread overview]
Message-ID: <20150819054120.GA3258@linux> (raw)
In-Reply-To: <1439949906-22177-1-git-send-email-pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

On 19-08-15, 10:05, Pi-Cheng Chen wrote:
> Mediatek MT8173 is an ARMv8 based quad-core (2*Cortex-A53 and
> 2*Cortex-A72) SoC with duall clusters. For each cluster, two voltage
> inputs, Vproc and Vsram are supplied by two regulators. For the big
> cluster, two regulators come from different PMICs. In this case, when
> scaling voltage inputs of the cluster, the voltages of two regulator
> inputs need to be controlled by software explicitly under the SoC
> specific limitation:
> 
> 	100mV < Vsram - Vproc < 200mV
> 
> which is called 'voltage tracking' mechanism. And when scaling the
> frequency of cluster clock input, the input MUX need to be parented to
> another "intermediate" stable PLL first and reparented to the original
> PLL once the original PLL is stable at the target frequency. This patch
> implements those mechanisms to enable CPU DVFS support for Mediatek
> MT8173 SoC.
> 
> Signed-off-by: Pi-Cheng Chen <pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Acked-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
> 
> Changes in v7:
> - add of_machine_is_compatible() check to be multiplatform friendly

Looks fine, thanks.

-- 
viresh
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WARNING: multiple messages have this Message-ID (diff)
From: viresh.kumar@linaro.org (Viresh Kumar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 2/3] cpufreq: mediatek: Add MT8173 cpufreq driver
Date: Wed, 19 Aug 2015 11:11:20 +0530	[thread overview]
Message-ID: <20150819054120.GA3258@linux> (raw)
In-Reply-To: <1439949906-22177-1-git-send-email-pi-cheng.chen@linaro.org>

On 19-08-15, 10:05, Pi-Cheng Chen wrote:
> Mediatek MT8173 is an ARMv8 based quad-core (2*Cortex-A53 and
> 2*Cortex-A72) SoC with duall clusters. For each cluster, two voltage
> inputs, Vproc and Vsram are supplied by two regulators. For the big
> cluster, two regulators come from different PMICs. In this case, when
> scaling voltage inputs of the cluster, the voltages of two regulator
> inputs need to be controlled by software explicitly under the SoC
> specific limitation:
> 
> 	100mV < Vsram - Vproc < 200mV
> 
> which is called 'voltage tracking' mechanism. And when scaling the
> frequency of cluster clock input, the input MUX need to be parented to
> another "intermediate" stable PLL first and reparented to the original
> PLL once the original PLL is stable at the target frequency. This patch
> implements those mechanisms to enable CPU DVFS support for Mediatek
> MT8173 SoC.
> 
> Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> ---
> 
> Changes in v7:
> - add of_machine_is_compatible() check to be multiplatform friendly

Looks fine, thanks.

-- 
viresh

WARNING: multiple messages have this Message-ID (diff)
From: Viresh Kumar <viresh.kumar@linaro.org>
To: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
	Michael Turquette <mturquette@baylibre.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	linaro-kernel@lists.linaro.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [PATCH v7 2/3] cpufreq: mediatek: Add MT8173 cpufreq driver
Date: Wed, 19 Aug 2015 11:11:20 +0530	[thread overview]
Message-ID: <20150819054120.GA3258@linux> (raw)
In-Reply-To: <1439949906-22177-1-git-send-email-pi-cheng.chen@linaro.org>

On 19-08-15, 10:05, Pi-Cheng Chen wrote:
> Mediatek MT8173 is an ARMv8 based quad-core (2*Cortex-A53 and
> 2*Cortex-A72) SoC with duall clusters. For each cluster, two voltage
> inputs, Vproc and Vsram are supplied by two regulators. For the big
> cluster, two regulators come from different PMICs. In this case, when
> scaling voltage inputs of the cluster, the voltages of two regulator
> inputs need to be controlled by software explicitly under the SoC
> specific limitation:
> 
> 	100mV < Vsram - Vproc < 200mV
> 
> which is called 'voltage tracking' mechanism. And when scaling the
> frequency of cluster clock input, the input MUX need to be parented to
> another "intermediate" stable PLL first and reparented to the original
> PLL once the original PLL is stable at the target frequency. This patch
> implements those mechanisms to enable CPU DVFS support for Mediatek
> MT8173 SoC.
> 
> Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> ---
> 
> Changes in v7:
> - add of_machine_is_compatible() check to be multiplatform friendly

Looks fine, thanks.

-- 
viresh

  parent reply	other threads:[~2015-08-19  5:41 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-17  9:24 [RESEND PATCH 0/3 v6] Add Mediatek MT8173 cpufreq driver Pi-Cheng Chen
2015-08-17  9:24 ` Pi-Cheng Chen
2015-08-17  9:24 ` Pi-Cheng Chen
2015-08-17  9:24 ` [RESEND PATCH 1/3 v6] dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings Pi-Cheng Chen
2015-08-17  9:24   ` Pi-Cheng Chen
2015-08-17  9:24 ` [RESEND PATCH 2/3 v6] cpufreq: mediatek: Add MT8173 cpufreq driver Pi-Cheng Chen
2015-08-17  9:24   ` Pi-Cheng Chen
     [not found]   ` <1439803465-19683-3-git-send-email-pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-08-18 10:09     ` Bartlomiej Zolnierkiewicz
2015-08-18 10:09       ` Bartlomiej Zolnierkiewicz
2015-08-18 10:09       ` Bartlomiej Zolnierkiewicz
2015-08-18 10:24       ` Viresh Kumar
2015-08-18 10:24         ` Viresh Kumar
2015-08-19  2:05         ` [PATCH v7 2/3] " Pi-Cheng Chen
2015-08-19  2:05           ` Pi-Cheng Chen
     [not found]           ` <1439949906-22177-1-git-send-email-pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-08-19  5:41             ` Viresh Kumar [this message]
2015-08-19  5:41               ` Viresh Kumar
2015-08-19  5:41               ` Viresh Kumar
     [not found] ` <1439803465-19683-1-git-send-email-pi-cheng.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-08-17  9:24   ` [RESEND PATCH 3/3 v6] arm64: dts: mt8173: mt8173-evb: Add mt8173 cpufreq driver support Pi-Cheng Chen
2015-08-17  9:24     ` Pi-Cheng Chen
2015-08-17  9:24     ` Pi-Cheng Chen
2015-08-25  2:10   ` [RESEND PATCH 0/3 v6] Add Mediatek MT8173 cpufreq driver Pi-Cheng Chen
2015-08-25  2:10     ` Pi-Cheng Chen
2015-08-25  2:10     ` Pi-Cheng Chen
2015-08-25 23:01     ` Rafael J. Wysocki
2015-08-25 23:01       ` Rafael J. Wysocki
2015-08-26  1:25       ` Pi-Cheng Chen
2015-08-26  1:25         ` Pi-Cheng Chen
2015-08-26  2:16         ` Viresh Kumar
2015-08-26  2:16           ` Viresh Kumar
2015-08-26  6:53           ` Pi-Cheng Chen
2015-08-26  6:53             ` Pi-Cheng Chen
2015-08-26  6:53             ` Pi-Cheng Chen
2015-08-28 14:06             ` Rafael J. Wysocki
2015-08-28 14:06               ` Rafael J. Wysocki
2015-09-02  6:45               ` Daniel Kurtz
2015-09-02  6:45                 ` Daniel Kurtz
2015-09-02 17:23                 ` Matthias Brugger
2015-09-02 17:23                   ` Matthias Brugger
2016-04-21 10:26                   ` Matthias Brugger
2016-04-21 10:26                     ` Matthias Brugger
2016-04-21 10:58                     ` Matthias Brugger
2016-04-21 10:58                       ` Matthias Brugger
2016-04-21 11:37                       ` Eddie Huang
2016-04-21 11:37                         ` Eddie Huang
2016-04-21 11:37                         ` Eddie Huang

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