All of lore.kernel.org
 help / color / mirror / Atom feed
From: Shawn Guo <shawnguo@kernel.org>
To: Adrian Alonso <aalonso@freescale.com>
Cc: linux-arm-kernel@lists.infradead.org, shawn.guo@linaro.org,
	linus.walleij@linaro.org, lznuaa@gmail.com,
	devicetree@vger.kernel.org, Frank.Li@freescale.com,
	nitin.garg@freescale.com, Anson.Huang@freescale.com,
	linux-gpio@vger.kernel.org, robh+dt@kernel.org,
	yibin.gong@freescale.com
Subject: Re: [PATCH v2 5/8] pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
Date: Mon, 7 Sep 2015 09:28:31 +0800	[thread overview]
Message-ID: <20150907012831.GE30746@tiger> (raw)
In-Reply-To: <1441147753-13239-5-git-send-email-aalonso@freescale.com>

On Tue, Sep 01, 2015 at 05:49:10PM -0500, Adrian Alonso wrote:
> - Add ZERO_OFFSET_VALID flag, on imx7d mux_conf reg
>   offset is zero for iomuxc-lspr controller
> - Do default initialization on parse group function.
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>

I do not follow why this patch is needed at all.  All the register
validity check are done against -1, and zero offset is already supported
by the driver in the current form.  Or am I missing anything?

Shawn

> ---
> Changes for V2: Resend
> 
>  drivers/pinctrl/freescale/pinctrl-imx.c | 23 +++++++++++++----------
>  drivers/pinctrl/freescale/pinctrl-imx.h |  1 +
>  2 files changed, 14 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
> index 95db9e8..9f019be 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -437,7 +437,7 @@ static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
>  	const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
>  	unsigned long config;
>  
> -	if (!pin_reg || pin_reg->conf_reg == -1) {
> +	if (pin_reg->conf_reg == -1) {
>  		seq_printf(s, "N/A");
>  		return;
>  	}
> @@ -536,21 +536,29 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
>  		return -ENOMEM;
>  
>  	for (i = 0; i < grp->npins; i++) {
> -		u32 mux_reg = be32_to_cpu(*list++);
> +		u32 mux_reg;
>  		u32 conf_reg;
>  		unsigned int pin_id;
>  		struct imx_pin_reg *pin_reg;
>  		struct imx_pin *pin = &grp->pins[i];
>  
> +		mux_reg = be32_to_cpu(*list++);
> +		if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
> +			mux_reg = -1;
> +
>  		if (info->flags & SHARE_MUX_CONF_REG) {
>  			conf_reg = mux_reg;
>  		} else {
>  			conf_reg = be32_to_cpu(*list++);
> -			if (!conf_reg)
> +			if (!(info->flags & ZERO_OFFSET_VALID) && !conf_reg)
>  				conf_reg = -1;
>  		}
>  
> -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +		if (info->flags & ZERO_OFFSET_VALID)
> +			pin_id = mux_reg / 4;
> +		else
> +			pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +
>  		pin_reg = &info->pin_regs[pin_id];
>  		pin->pin = pin_id;
>  		grp->pin_ids[i] = pin_id;
> @@ -684,7 +692,7 @@ int imx_pinctrl_probe(struct platform_device *pdev,
>  {
>  	struct imx_pinctrl *ipctl;
>  	struct resource *res;
> -	int ret, i;
> +	int ret;
>  
>  	if (!info || !info->pins || !info->npins) {
>  		dev_err(&pdev->dev, "wrong pinctrl info\n");
> @@ -702,11 +710,6 @@ int imx_pinctrl_probe(struct platform_device *pdev,
>  	if (!info->pin_regs)
>  		return -ENOMEM;
>  
> -	for (i = 0; i < info->npins; i++) {
> -		info->pin_regs[i].mux_reg = -1;
> -		info->pin_regs[i].conf_reg = -1;
> -	}
> -
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	ipctl->base = devm_ioremap_resource(&pdev->dev, res);
>  	if (IS_ERR(ipctl->base))
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h
> index 26f8f1c..67c07c2 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.h
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.h
> @@ -85,6 +85,7 @@ struct imx_pinctrl_soc_info {
>  };
>  
>  #define SHARE_MUX_CONF_REG	0x1
> +#define ZERO_OFFSET_VALID	0x2
>  
>  #define NO_MUX		0x0
>  #define NO_PAD		0x0
> -- 
> 2.1.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/8] pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
Date: Mon, 7 Sep 2015 09:28:31 +0800	[thread overview]
Message-ID: <20150907012831.GE30746@tiger> (raw)
In-Reply-To: <1441147753-13239-5-git-send-email-aalonso@freescale.com>

On Tue, Sep 01, 2015 at 05:49:10PM -0500, Adrian Alonso wrote:
> - Add ZERO_OFFSET_VALID flag, on imx7d mux_conf reg
>   offset is zero for iomuxc-lspr controller
> - Do default initialization on parse group function.
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>

I do not follow why this patch is needed at all.  All the register
validity check are done against -1, and zero offset is already supported
by the driver in the current form.  Or am I missing anything?

Shawn

> ---
> Changes for V2: Resend
> 
>  drivers/pinctrl/freescale/pinctrl-imx.c | 23 +++++++++++++----------
>  drivers/pinctrl/freescale/pinctrl-imx.h |  1 +
>  2 files changed, 14 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
> index 95db9e8..9f019be 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -437,7 +437,7 @@ static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
>  	const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
>  	unsigned long config;
>  
> -	if (!pin_reg || pin_reg->conf_reg == -1) {
> +	if (pin_reg->conf_reg == -1) {
>  		seq_printf(s, "N/A");
>  		return;
>  	}
> @@ -536,21 +536,29 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
>  		return -ENOMEM;
>  
>  	for (i = 0; i < grp->npins; i++) {
> -		u32 mux_reg = be32_to_cpu(*list++);
> +		u32 mux_reg;
>  		u32 conf_reg;
>  		unsigned int pin_id;
>  		struct imx_pin_reg *pin_reg;
>  		struct imx_pin *pin = &grp->pins[i];
>  
> +		mux_reg = be32_to_cpu(*list++);
> +		if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
> +			mux_reg = -1;
> +
>  		if (info->flags & SHARE_MUX_CONF_REG) {
>  			conf_reg = mux_reg;
>  		} else {
>  			conf_reg = be32_to_cpu(*list++);
> -			if (!conf_reg)
> +			if (!(info->flags & ZERO_OFFSET_VALID) && !conf_reg)
>  				conf_reg = -1;
>  		}
>  
> -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +		if (info->flags & ZERO_OFFSET_VALID)
> +			pin_id = mux_reg / 4;
> +		else
> +			pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +
>  		pin_reg = &info->pin_regs[pin_id];
>  		pin->pin = pin_id;
>  		grp->pin_ids[i] = pin_id;
> @@ -684,7 +692,7 @@ int imx_pinctrl_probe(struct platform_device *pdev,
>  {
>  	struct imx_pinctrl *ipctl;
>  	struct resource *res;
> -	int ret, i;
> +	int ret;
>  
>  	if (!info || !info->pins || !info->npins) {
>  		dev_err(&pdev->dev, "wrong pinctrl info\n");
> @@ -702,11 +710,6 @@ int imx_pinctrl_probe(struct platform_device *pdev,
>  	if (!info->pin_regs)
>  		return -ENOMEM;
>  
> -	for (i = 0; i < info->npins; i++) {
> -		info->pin_regs[i].mux_reg = -1;
> -		info->pin_regs[i].conf_reg = -1;
> -	}
> -
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	ipctl->base = devm_ioremap_resource(&pdev->dev, res);
>  	if (IS_ERR(ipctl->base))
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h
> index 26f8f1c..67c07c2 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.h
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.h
> @@ -85,6 +85,7 @@ struct imx_pinctrl_soc_info {
>  };
>  
>  #define SHARE_MUX_CONF_REG	0x1
> +#define ZERO_OFFSET_VALID	0x2
>  
>  #define NO_MUX		0x0
>  #define NO_PAD		0x0
> -- 
> 2.1.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2015-09-07  1:28 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-01 22:49 [PATCH v2 1/8] pinctrl: freescale: imx: fix system crash if enable two pinctl instances Adrian Alonso
2015-09-01 22:49 ` Adrian Alonso
2015-09-01 22:49 ` [PATCH v2 2/8] ARM: imx: imx7d-pinfunc: add gpio1 pad iomux settings Adrian Alonso
2015-09-01 22:49   ` Adrian Alonso
2015-09-07  1:01   ` Shawn Guo
2015-09-07  1:01     ` Shawn Guo
2015-09-07  2:18     ` Duan Andy
2015-09-07  2:18       ` Duan Andy
2015-09-01 22:49 ` [PATCH v2 3/8] ARM: dts: imx: imx7d add iomuxc lpsr device node Adrian Alonso
2015-09-01 22:49   ` Adrian Alonso
     [not found] ` <1441147753-13239-1-git-send-email-aalonso-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2015-09-01 22:49   ` [PATCH v2 4/8] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads Adrian Alonso
2015-09-01 22:49     ` Adrian Alonso
2015-09-01 22:49 ` [PATCH v2 5/8] pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag Adrian Alonso
2015-09-01 22:49   ` Adrian Alonso
2015-09-07  1:28   ` Shawn Guo [this message]
2015-09-07  1:28     ` Shawn Guo
2015-09-08 16:05     ` Alonso Adrian
2015-09-08 16:05       ` Alonso Adrian
2015-09-18 13:52       ` Shawn Guo
2015-09-18 13:52         ` Shawn Guo
2015-09-18 16:27         ` Alonso Adrian
2015-09-18 16:27           ` Alonso Adrian
2015-09-01 22:49 ` [PATCH v2 6/8] pinctrl: freescale: imx: add shared input select reg support Adrian Alonso
2015-09-01 22:49   ` Adrian Alonso
2015-09-07  2:12   ` Shawn Guo
2015-09-07  2:12     ` Shawn Guo
2015-09-08 16:13     ` Alonso Adrian
2015-09-08 16:13       ` Alonso Adrian
2015-09-01 22:49 ` [PATCH v2 7/8] pinctrl: freescale: imx7d: support iomux lpsr controller Adrian Alonso
2015-09-01 22:49   ` Adrian Alonso
2015-09-01 22:49 ` [PATCH v2 8/8] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings Adrian Alonso
2015-09-01 22:49   ` Adrian Alonso
2015-09-07  2:42   ` Shawn Guo
2015-09-07  2:42     ` Shawn Guo
2015-09-08 16:15     ` Alonso Adrian
2015-09-08 16:15       ` Alonso Adrian
2015-09-07  0:56 ` [PATCH v2 1/8] pinctrl: freescale: imx: fix system crash if enable two pinctl instances Shawn Guo
2015-09-07  0:56   ` Shawn Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150907012831.GE30746@tiger \
    --to=shawnguo@kernel.org \
    --cc=Anson.Huang@freescale.com \
    --cc=Frank.Li@freescale.com \
    --cc=aalonso@freescale.com \
    --cc=devicetree@vger.kernel.org \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=lznuaa@gmail.com \
    --cc=nitin.garg@freescale.com \
    --cc=robh+dt@kernel.org \
    --cc=shawn.guo@linaro.org \
    --cc=yibin.gong@freescale.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.