From: Aurelien Jarno <aurelien@aurel32.net>
To: Leon Alrae <leon.alrae@imgtec.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 0/2] target-mips: minor clean up in mtc0 and mfc0
Date: Wed, 16 Sep 2015 06:46:17 +0200 [thread overview]
Message-ID: <20150916044617.GA12445@aurel32.net> (raw)
In-Reply-To: <1442234754-15692-1-git-send-email-leon.alrae@imgtec.com>
On 2015-09-14 13:45, Leon Alrae wrote:
> This patchset removes the gen_mtc0_store64() which is actually incorrect
> as MTC0 instruction in MIPS64 is supposed to move entire content (if
> dst CP0 register is 64-bit) without sign extending. It also removes the
> gen_mfc0_load64() and replaces the pair of tcg_gen_ld_tl() +
> tcg_gen_ext32s_tl() with single tcg_gen_ld32s_tl().
>
> Leon Alrae (2):
> target-mips: correct MTC0 instruction on MIPS64
> target-mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl()
The existence of tcg_gen_ld32s_tl is relatively recent, that's why we
had it opened coded up to now.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
prev parent reply other threads:[~2015-09-16 4:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-14 12:45 [Qemu-devel] [PATCH 0/2] target-mips: minor clean up in mtc0 and mfc0 Leon Alrae
2015-09-14 12:45 ` [Qemu-devel] [PATCH 1/2] target-mips: correct MTC0 instruction on MIPS64 Leon Alrae
2015-09-14 12:45 ` [Qemu-devel] [PATCH 2/2] target-mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl() Leon Alrae
2015-09-16 18:14 ` Richard Henderson
2015-09-16 19:00 ` Leon Alrae
2015-09-16 4:46 ` Aurelien Jarno [this message]
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