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From: Mark Brown <broonie@kernel.org>
To: Vinod Koul <vinod.koul@intel.com>
Cc: alsa-devel@alsa-project.org, patches.audio@intel.com,
	Hardik T Shah <hardik.t.shah@intel.com>,
	liam.r.girdwood@linux.intel.com, Jeeja KP <jeeja.kp@intel.com>,
	"Subhransu S. Prusty" <subhransu.s.prusty@intel.com>
Subject: Re: [PATCH v2 3/9] ASoC: Intel: Skylake: add DSP platform widget event handlers
Date: Sat, 19 Sep 2015 09:11:22 -0700	[thread overview]
Message-ID: <20150919161122.GD30445@sirena.org.uk> (raw)
In-Reply-To: <1439832404-12424-4-git-send-email-vinod.koul@intel.com>


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On Mon, Aug 17, 2015 at 10:56:38PM +0530, Vinod Koul wrote:

> +	if (list_empty(&s_pipe->w_list)) {
> +		ret = skl_tplg_get_pipe_widget(ctx->dev, w, s_pipe);
> +		if (ret < 0)
> +			return ret;
> +	}

I'm not entirely clear what this is supposed to do or if it does it
correctly - I suspect it's trying to always create the pipe widget which
might be a bit clearer if it just created the pipe widget.  The fact
that it's checking if a list is empty is a bit worrying, what if some
but not all of the entries needed on that list are there?  Is just
getting a widget really sufficient initialisation?

> +	return skl_tplg_bind_unbind_pipe_modules(ctx, s_pipe, true);
> +}
> +/*
> + * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA

Blank line between functions and the next thing.  I am getting fed up of
seeing this.

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  parent reply	other threads:[~2015-09-20  0:32 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-17 17:26 [PATCH v2 0/9] Add DSP topology management for SKL Vinod Koul
2015-08-17 17:26 ` [PATCH v2 1/9] ASoC: Intel: Skylake: Add pipe and modules handlers Vinod Koul
2015-09-19 16:00   ` Mark Brown
2015-09-21  3:37     ` Vinod Koul
2015-09-21 16:36       ` Mark Brown
2015-08-17 17:26 ` [PATCH v2 2/9] ASoC: Intel: Skylake: Add module configuration helpers Vinod Koul
2015-08-17 17:26 ` [PATCH v2 3/9] ASoC: Intel: Skylake: add DSP platform widget event handlers Vinod Koul
2015-09-17  9:47   ` Liam Girdwood
2015-09-17 11:38     ` Vinod Koul
2015-09-17 12:25       ` Liam Girdwood
2015-09-18  4:22         ` Vinod Koul
2015-09-19 16:11   ` Mark Brown [this message]
2015-09-21  3:24     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 4/9] ASoC: Intel: Skylake: Add FE and BE hw_params handling Vinod Koul
2015-09-19 16:22   ` Mark Brown
2015-09-21  3:13     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 5/9] ASoC: Intel: Skylake: Add topology core init and handlers Vinod Koul
2015-09-18  9:55   ` Liam Girdwood
2015-09-18 15:09     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 6/9] ASoC: Intel: Skylake: Initialize and load DSP controls Vinod Koul
2015-09-18  9:58   ` Liam Girdwood
2015-09-18 15:11     ` Vinod Koul
2015-09-19 16:26     ` Mark Brown
2015-09-21  3:26       ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 7/9] ASoC: Intel: Skylake: Add DSP support and enable it Vinod Koul
2015-08-17 17:26 ` [PATCH v2 8/9] ASoC: Intel: Skylake: Initialize NHLT table Vinod Koul
2015-09-19 16:27   ` Mark Brown
2015-09-21  3:38     ` Vinod Koul
2015-08-17 17:26 ` [PATCH v2 9/9] ASoC: Intel: Skylake: Remove unused CPU dai's Vinod Koul
2015-09-03  8:14 ` [PATCH v2 0/9] Add DSP topology management for SKL Vinod Koul
2015-09-11 11:45   ` Mark Brown
2015-09-19 16:56     ` Mark Brown
2015-09-21  3:57       ` Vinod Koul
2015-09-21 16:33         ` Mark Brown
2015-09-21 16:47           ` Vinod Koul

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