All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mark Rutland <mark.rutland@arm.com>
To: linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v11 1/8] arm64: renesas: r8a7795: Add Renesas R8A7795 SoC support
Date: Thu, 15 Oct 2015 10:58:20 +0000	[thread overview]
Message-ID: <20151015105820.GF8825@leverpostej> (raw)
In-Reply-To: <1444890243-6978-2-git-send-email-horms+renesas@verge.net.au>


Hi,

> > +		gic: interrupt-controller@0xf1010000 {
> +			compatible = "arm,gic-400";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg = <0x0 0xf1010000 0 0x1000>,
> +			      <0x0 0xf1020000 0 0x2000>;
> +			interrupts = <GIC_PPI 9
> +					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
> +		};

No GICH and GICV?

Which exception level do CPUs boot at?

> +		clock {
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			#clock-cells = <1>;
> +			ranges;
> +
> +			cpg_clocks: cpg_clocks@e6150000 {
> +				compatible = "renesas,r8a7795-cpg-clocks",
> +					     "renesas,rcar-gen3-cpg-clocks";
> +				reg = <0 0xe6150000 0 0x1000>;
> +				clocks = <&extal_clk>;
> +				clock-indices = <
> +					R8A7795_CLK_MAIN R8A7795_CLK_PLL0
> +					R8A7795_CLK_PLL1 R8A7795_CLK_PLL2
> +					R8A7795_CLK_PLL3 R8A7795_CLK_PLL4
> +				>;
> +				clock-output-names = "main", "pll0", "pll1",
> +						     "pll2", "pll3", "pll4";
> +				#power-domain-cells = <0>;
> +			};
> +		};

This clock node makes no sense. It's not compatible with anything and
doesn't provide clocks itself, so #clock-cells is meaningless, and
nothing underneath it is guaranteed to be probed.

Please get rid of the clock node. It is a cargo-culted piece of magic
that shouldn't exist.

Also, cpg_clocks node is missing #clock-cells, given it has
clock-output-names I assume it is itself a clock provider, and
presumably should have #clock-cells = <1>.

Thanks,
Mark.

WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v11 1/8] arm64: renesas: r8a7795: Add Renesas R8A7795 SoC support
Date: Thu, 15 Oct 2015 11:58:20 +0100	[thread overview]
Message-ID: <20151015105820.GF8825@leverpostej> (raw)
In-Reply-To: <1444890243-6978-2-git-send-email-horms+renesas@verge.net.au>


Hi,

> > +		gic: interrupt-controller at 0xf1010000 {
> +			compatible = "arm,gic-400";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg = <0x0 0xf1010000 0 0x1000>,
> +			      <0x0 0xf1020000 0 0x2000>;
> +			interrupts = <GIC_PPI 9
> +					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
> +		};

No GICH and GICV?

Which exception level do CPUs boot at?

> +		clock {
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			#clock-cells = <1>;
> +			ranges;
> +
> +			cpg_clocks: cpg_clocks at e6150000 {
> +				compatible = "renesas,r8a7795-cpg-clocks",
> +					     "renesas,rcar-gen3-cpg-clocks";
> +				reg = <0 0xe6150000 0 0x1000>;
> +				clocks = <&extal_clk>;
> +				clock-indices = <
> +					R8A7795_CLK_MAIN R8A7795_CLK_PLL0
> +					R8A7795_CLK_PLL1 R8A7795_CLK_PLL2
> +					R8A7795_CLK_PLL3 R8A7795_CLK_PLL4
> +				>;
> +				clock-output-names = "main", "pll0", "pll1",
> +						     "pll2", "pll3", "pll4";
> +				#power-domain-cells = <0>;
> +			};
> +		};

This clock node makes no sense. It's not compatible with anything and
doesn't provide clocks itself, so #clock-cells is meaningless, and
nothing underneath it is guaranteed to be probed.

Please get rid of the clock node. It is a cargo-culted piece of magic
that shouldn't exist.

Also, cpg_clocks node is missing #clock-cells, given it has
clock-output-names I assume it is itself a clock provider, and
presumably should have #clock-cells = <1>.

Thanks,
Mark.

  reply	other threads:[~2015-10-15 10:58 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-15  6:23 [PATCH v11 0/8] arm64: renesas: Add Renesas R8A7795 SoC support Simon Horman
2015-10-15  6:23 ` Simon Horman
2015-10-15  6:23 ` [PATCH v11 1/8] arm64: renesas: r8a7795: " Simon Horman
2015-10-15  6:23   ` Simon Horman
2015-10-15 10:58   ` Mark Rutland [this message]
2015-10-15 10:58     ` Mark Rutland
2015-10-21 13:34     ` Geert Uytterhoeven
2015-10-21 13:34       ` Geert Uytterhoeven
2015-11-03 14:28       ` Mark Rutland
2015-11-03 14:28         ` Mark Rutland
2015-11-03 14:43         ` Geert Uytterhoeven
2015-11-03 14:43           ` Geert Uytterhoeven
2015-12-09  8:23         ` Geert Uytterhoeven
2015-12-09  8:23           ` Geert Uytterhoeven
2015-10-15  6:23 ` [PATCH v11 2/8] arm64: renesas: r8a7795 dtsi: Add all common divider clocks Simon Horman
2015-10-15  6:23   ` Simon Horman
2015-10-15  6:23 ` [PATCH v11 3/8] arm64: renesas: r8a7795 dtsi: Add dummy dma-controller nodes Simon Horman
2015-10-15  6:23   ` Simon Horman
2015-10-15  6:23 ` [PATCH v11 4/8] arm64: renesas: r8a7795 dtsi: Add all SCIF nodes Simon Horman
2015-10-15  6:23   ` Simon Horman
2015-10-15  6:24 ` [PATCH v11 5/8] arm64: renesas: r8a7795: enable PFC Simon Horman
2015-10-15  6:24   ` Simon Horman
2015-10-15  6:24 ` [PATCH v11 6/8] arm64: renesas: add Salvator-X board support on DTS Simon Horman
2015-10-15  6:24   ` Simon Horman
2015-10-15 11:01   ` Mark Rutland
2015-10-15 11:01     ` Mark Rutland
2015-10-23  7:00     ` Simon Horman
2015-10-23  7:00       ` Simon Horman
2015-10-29  7:52       ` Geert Uytterhoeven
2015-10-29  7:52         ` Geert Uytterhoeven
2015-10-30  7:51         ` Simon Horman
2015-10-30  7:51           ` Simon Horman
2015-11-03 14:24         ` Geert Uytterhoeven
2015-11-03 14:24           ` Geert Uytterhoeven
2015-11-09  2:19           ` Simon Horman
2015-11-09  2:19             ` Simon Horman
2015-11-16  9:53           ` Geert Uytterhoeven
2015-11-16  9:53             ` Geert Uytterhoeven
2015-11-17 17:31             ` Simon Horman
2015-11-17 17:31               ` Simon Horman
2015-10-15  6:24 ` [PATCH v11 7/8] arm64: defconfig: renesas: Enable Renesas r8a7795 SoC Simon Horman
2015-10-15  6:24   ` Simon Horman
2015-10-15  6:24 ` [PATCH v11 8/8] MAINTAINERS: Add entry Renesas arm64 architecture Simon Horman
2015-10-15  6:24   ` Simon Horman
2015-10-15  6:45   ` Khiem Nguyen
2015-10-15  6:45     ` Khiem Nguyen
2015-10-15  8:04     ` Russell King - ARM Linux
2015-10-15  8:04       ` Russell King - ARM Linux
2015-10-15  8:10       ` Khiem Nguyen
2015-10-15  8:10         ` Khiem Nguyen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20151015105820.GF8825@leverpostej \
    --to=mark.rutland@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.