[PATCH V2 0/4] MIPS: Loongson-3: Improve kernel functionality

[PATCH V2 0/4] MIPS: Loongson-3: Improve kernel functionality

[Huacai Chen]

This patchset is prepared for the next 4.4 release for Linux/MIPS. In this
series we cleanup the naming style of Loongson's directory and Kconfig options,
move chipset ACPI code from drivers to arch since it is mostly Loongson-3
specific, introduce coherent cache features to improve performance, and Make
CPU names in /proc/cpuinfo more human-readable.

V1 -> V2:
1, Remove merged patches.
2, Cleanup CONFIG_LOONGSON_SUSPEND.
3, Rebase the code for 4.4.

Huacai Chen(4):
 MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND.
 MIPS: Loongson-3: Move chipset ACPI code from drivers to arch.
 MIPS: Loongson: Introduce and use cpu_has_coherent_cache feature.
 MIPS: Loongson: Make CPU names more clear.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/Kconfig                                  |   3 +
 arch/mips/include/asm/cpu-features.h               |   3 +
 .../asm/mach-loongson64/cpu-feature-overrides.h    |   1 +
 arch/mips/kernel/cpu-probe.c                       |   8 +-
 arch/mips/loongson64/Kconfig                       |   5 -
 arch/mips/loongson64/common/Makefile               |   2 +-
 arch/mips/loongson64/lemote-2f/Makefile            |   2 +-
 arch/mips/loongson64/loongson-3/Makefile           |   2 +-
 arch/mips/loongson64/loongson-3/acpi_init.c        | 150 +++++++++++++++++++++
 arch/mips/mm/c-r4k.c                               |  21 +++
 drivers/platform/mips/Kconfig                      |   4 -
 drivers/platform/mips/Makefile                     |   1 -
 drivers/platform/mips/acpi_init.c                  | 150 ---------------------
 13 files changed, 185 insertions(+), 167 deletions(-)
 create mode 100644 arch/mips/loongson64/loongson-3/acpi_init.c
 delete mode 100644 drivers/platform/mips/acpi_init.c
--
2.4.6

[PATCH V2 1/4] MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND.

[Huacai Chen]

Now LOONGSON_CHIPCFG register definition doesn't depend on CPUFREQ any
more, so CPU_SUPPORTS_CPUFREQ is no longer needed for suspend/resume.
Remove CONFIG_LOONGSON_SUSPEND and use CONFIG_SUSPEND instead.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/loongson64/Kconfig            | 5 -----
 arch/mips/loongson64/common/Makefile    | 2 +-
 arch/mips/loongson64/lemote-2f/Makefile | 2 +-
 3 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/mips/loongson64/Kconfig b/arch/mips/loongson64/Kconfig
index 497912b..8e6e292 100644
--- a/arch/mips/loongson64/Kconfig
+++ b/arch/mips/loongson64/Kconfig
@@ -120,11 +120,6 @@ config RS780_HPET
 
 	  If unsure, say Yes.
 
-config LOONGSON_SUSPEND
-	bool
-	default y
-	depends on CPU_SUPPORTS_CPUFREQ && SUSPEND
-
 config LOONGSON_UART_BASE
 	bool
 	default y
diff --git a/arch/mips/loongson64/common/Makefile b/arch/mips/loongson64/common/Makefile
index f2e8153..074d9cb 100644
--- a/arch/mips/loongson64/common/Makefile
+++ b/arch/mips/loongson64/common/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_CS5536) += cs5536/
 # Suspend Support
 #
 
-obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o
+obj-$(CONFIG_SUSPEND) += pm.o
 
 #
 # Big Memory (SWIOTLB) Support
diff --git a/arch/mips/loongson64/lemote-2f/Makefile b/arch/mips/loongson64/lemote-2f/Makefile
index 4f9eaa3..08b8abc 100644
--- a/arch/mips/loongson64/lemote-2f/Makefile
+++ b/arch/mips/loongson64/lemote-2f/Makefile
@@ -8,4 +8,4 @@ obj-y += clock.o machtype.o irq.o reset.o ec_kb3310b.o
 # Suspend Support
 #
 
-obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o
+obj-$(CONFIG_SUSPEND) += pm.o
-- 
2.4.6

[PATCH V2 2/4] MIPS: Loongson-3: Move chipset ACPI code from drivers to arch

[Huacai Chen]

SB700/SB710/SB800 chipset ACPI code is mostly Loongson-3 specific
routines rather than a "platform driver".

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/loongson64/loongson-3/Makefile                              | 2 +-
 .../platform/mips => arch/mips/loongson64/loongson-3}/acpi_init.c     | 0
 drivers/platform/mips/Kconfig                                         | 4 ----
 drivers/platform/mips/Makefile                                        | 1 -
 4 files changed, 1 insertion(+), 6 deletions(-)
 rename {drivers/platform/mips => arch/mips/loongson64/loongson-3}/acpi_init.c (100%)

diff --git a/arch/mips/loongson64/loongson-3/Makefile b/arch/mips/loongson64/loongson-3/Makefile
index 622fead..44bc148 100644
--- a/arch/mips/loongson64/loongson-3/Makefile
+++ b/arch/mips/loongson64/loongson-3/Makefile
@@ -1,7 +1,7 @@
 #
 # Makefile for Loongson-3 family machines
 #
-obj-y			+= irq.o cop2-ex.o platform.o
+obj-y			+= irq.o cop2-ex.o platform.o acpi_init.o
 
 obj-$(CONFIG_SMP)	+= smp.o
 
diff --git a/drivers/platform/mips/acpi_init.c b/arch/mips/loongson64/loongson-3/acpi_init.c
similarity index 100%
rename from drivers/platform/mips/acpi_init.c
rename to arch/mips/loongson64/loongson-3/acpi_init.c
diff --git a/drivers/platform/mips/Kconfig b/drivers/platform/mips/Kconfig
index 125e569..b3ae30a 100644
--- a/drivers/platform/mips/Kconfig
+++ b/drivers/platform/mips/Kconfig
@@ -15,10 +15,6 @@ menuconfig MIPS_PLATFORM_DEVICES
 
 if MIPS_PLATFORM_DEVICES
 
-config MIPS_ACPI
-	bool
-	default y if LOONGSON_MACH3X
-
 config CPU_HWMON
 	tristate "Loongson CPU HWMon Driver"
 	depends on LOONGSON_MACH3X
diff --git a/drivers/platform/mips/Makefile b/drivers/platform/mips/Makefile
index 4341284..8dfd039 100644
--- a/drivers/platform/mips/Makefile
+++ b/drivers/platform/mips/Makefile
@@ -1,2 +1 @@
-obj-$(CONFIG_MIPS_ACPI) += acpi_init.o
 obj-$(CONFIG_CPU_HWMON) += cpu_hwmon.o
-- 
2.4.6

[PATCH V2 3/4] MIPS: Loongson: Introduce and use cpu_has_coherent_cache feature

[Huacai Chen]

Loongson-3 maintains cache coherency by hardware. So we introduce a cpu
feature named cpu_has_coherent_cache and use it to modify MIPS's cache
flushing functions.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Hongliang Tao <taohl@lemote.com>
---
 arch/mips/Kconfig                                   |  3 +++
 arch/mips/include/asm/cpu-features.h                |  3 +++
 .../asm/mach-loongson64/cpu-feature-overrides.h     |  1 +
 arch/mips/mm/c-r4k.c                                | 21 +++++++++++++++++++++
 4 files changed, 28 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9322d26..3a8b7e5 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1769,6 +1769,7 @@ config CPU_BMIPS5000
 config SYS_HAS_CPU_LOONGSON3
 	bool
 	select CPU_SUPPORTS_CPUFREQ
+	select CPU_SUPPORTS_COHERENT_CACHE
 
 config SYS_HAS_CPU_LOONGSON2E
 	bool
@@ -1950,6 +1951,8 @@ config CPU_SUPPORTS_HUGEPAGES
 	bool
 config CPU_SUPPORTS_UNCACHED_ACCELERATED
 	bool
+config CPU_SUPPORTS_COHERENT_CACHE
+	bool
 config MIPS_PGD_C0_CONTEXT
 	bool
 	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index d1e04c9..565940e 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -157,6 +157,9 @@
 #ifndef cpu_has_pindexed_dcache
 #define cpu_has_pindexed_dcache	(cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
 #endif
+#ifndef cpu_has_coherent_cache
+#define cpu_has_coherent_cache	0
+#endif
 #ifndef cpu_has_local_ebase
 #define cpu_has_local_ebase	1
 #endif
diff --git a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
index 98963c2..e0bef38 100644
--- a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
@@ -57,5 +57,6 @@
 #define cpu_has_local_ebase	0
 
 #define cpu_has_wsbh		IS_ENABLED(CONFIG_CPU_LOONGSON3)
+#define cpu_has_coherent_cache	IS_ENABLED(CONFIG_CPU_SUPPORTS_COHERENT_CACHE)
 
 #endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 5d3a25e..ed6e36e 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -428,6 +428,9 @@ static void r4k_blast_scache_setup(void)
 
 static inline void local_r4k___flush_cache_all(void * args)
 {
+	if (cpu_has_coherent_cache)
+		return;
+
 	switch (current_cpu_type()) {
 	case CPU_LOONGSON2:
 	case CPU_LOONGSON3:
@@ -456,6 +459,9 @@ static inline void local_r4k___flush_cache_all(void * args)
 
 static void r4k___flush_cache_all(void)
 {
+	if (cpu_has_coherent_cache)
+		return;
+
 	r4k_on_each_cpu(local_r4k___flush_cache_all, NULL);
 }
 
@@ -502,6 +508,9 @@ static void r4k_flush_cache_range(struct vm_area_struct *vma,
 {
 	int exec = vma->vm_flags & VM_EXEC;
 
+	if (cpu_has_coherent_cache)
+		return;
+
 	if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc))
 		r4k_on_each_cpu(local_r4k_flush_cache_range, vma);
 }
@@ -625,6 +634,9 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
 {
 	struct flush_cache_page_args args;
 
+	if (cpu_has_coherent_cache)
+		return;
+
 	args.vma = vma;
 	args.addr = addr;
 	args.pfn = pfn;
@@ -634,11 +646,17 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
 
 static inline void local_r4k_flush_data_cache_page(void * addr)
 {
+	if (cpu_has_coherent_cache)
+		return;
+
 	r4k_blast_dcache_page((unsigned long) addr);
 }
 
 static void r4k_flush_data_cache_page(unsigned long addr)
 {
+	if (cpu_has_coherent_cache)
+		return;
+
 	if (in_atomic())
 		local_r4k_flush_data_cache_page((void *)addr);
 	else
@@ -823,6 +841,9 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
 
 static void r4k_flush_cache_sigtramp(unsigned long addr)
 {
+	if (cpu_has_coherent_cache)
+		return;
+
 	r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr);
 }
 
-- 
2.4.6

[PATCH V2 4/4] MIPS: Loongson: Make CPU names more clear

[Huacai Chen]

Make names in /proc/cpuinfo more human-readable, Since GCC support the
new-style names for a long time, this may not break -march=native any
more.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/kernel/cpu-probe.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 6b90644..fa972de 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -999,28 +999,28 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
 		switch (c->processor_id & PRID_REV_MASK) {
 		case PRID_REV_LOONGSON2E:
 			c->cputype = CPU_LOONGSON2;
-			__cpu_name[cpu] = "ICT Loongson-2";
+			__cpu_name[cpu] = "ICT Loongson-2E";
 			set_elf_platform(cpu, "loongson2e");
 			set_isa(c, MIPS_CPU_ISA_III);
 			c->fpu_msk31 |= FPU_CSR_CONDX;
 			break;
 		case PRID_REV_LOONGSON2F:
 			c->cputype = CPU_LOONGSON2;
-			__cpu_name[cpu] = "ICT Loongson-2";
+			__cpu_name[cpu] = "ICT Loongson-2F";
 			set_elf_platform(cpu, "loongson2f");
 			set_isa(c, MIPS_CPU_ISA_III);
 			c->fpu_msk31 |= FPU_CSR_CONDX;
 			break;
 		case PRID_REV_LOONGSON3A:
 			c->cputype = CPU_LOONGSON3;
-			__cpu_name[cpu] = "ICT Loongson-3";
+			__cpu_name[cpu] = "ICT Loongson-3A";
 			set_elf_platform(cpu, "loongson3a");
 			set_isa(c, MIPS_CPU_ISA_M64R1);
 			break;
 		case PRID_REV_LOONGSON3B_R1:
 		case PRID_REV_LOONGSON3B_R2:
 			c->cputype = CPU_LOONGSON3;
-			__cpu_name[cpu] = "ICT Loongson-3";
+			__cpu_name[cpu] = "ICT Loongson-3B";
 			set_elf_platform(cpu, "loongson3b");
 			set_isa(c, MIPS_CPU_ISA_M64R1);
 			break;
-- 
2.4.6

Re: [PATCH V2 4/4] MIPS: Loongson: Make CPU names more clear

[Ralf Baechle]

On Wed, Oct 07, 2015 at 02:08:02PM +0800, Huacai Chen wrote:

> Make names in /proc/cpuinfo more human-readable, Since GCC support the
> new-style names for a long time, this may not break -march=native any
> more.

I do understand why you want to make this change - but things in proc
including CPU names are interfaces and those are cast in stone.  You
can't just call a potatoe a cherry today :-)

Unless you have a good reason which would include demonstrating that is
not breaking any existing application code?

  Ralf

Re: [PATCH V2 4/4] MIPS: Loongson: Make CPU names more clear

[陈华才]

OK, I will resend this patch after a long time, until no applications be broken.
 
BTW, can these two patches be merged? or do they have problems to be fix?
http://patchwork.linux-mips.org/patch/11272/
http://patchwork.linux-mips.org/patch/11273/
 
------------------ Original ------------------
From:  "Ralf Baechle"<ralf@linux-mips.org>;
Date:  Tue, Nov 10, 2015 07:12 PM
To:  "Huacai Chen"<chenhc@lemote.com>;
Cc:  "John Crispin"<john@phrozen.org>; "Steven J. Hill"<Steven.Hill@imgtec.com>; "linux-mips"<linux-mips@linux-mips.org>; "Fuxin Zhang"<zhangfx@lemote.com>; "wuzhangjin"<wuzhangjin@gmail.com>;
Subject:  Re: [PATCH V2 4/4] MIPS: Loongson: Make CPU names more clear
 
On Wed, Oct 07, 2015 at 02:08:02PM +0800, Huacai Chen wrote:

> Make names in /proc/cpuinfo more human-readable, Since GCC support the
> new-style names for a long time, this may not break -march=native any
> more.

I do understand why you want to make this change - but things in proc
including CPU names are interfaces and those are cast in stone.  You
can't just call a potatoe a cherry today :-)

Unless you have a good reason which would include demonstrating that is
not breaking any existing application code?

  Ralf

Re: [PATCH V2 2/4] MIPS: Loongson-3: Move chipset ACPI code from drivers to arch

[Huacai Chen]

Hi, Ralf,

Can this patch be merged? or does it have problems to be fix?

Huacai

On Wed, Oct 7, 2015 at 2:08 PM, Huacai Chen <chenhc@lemote.com> wrote:
> SB700/SB710/SB800 chipset ACPI code is mostly Loongson-3 specific
> routines rather than a "platform driver".
>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
>  arch/mips/loongson64/loongson-3/Makefile                              | 2 +-
>  .../platform/mips => arch/mips/loongson64/loongson-3}/acpi_init.c     | 0
>  drivers/platform/mips/Kconfig                                         | 4 ----
>  drivers/platform/mips/Makefile                                        | 1 -
>  4 files changed, 1 insertion(+), 6 deletions(-)
>  rename {drivers/platform/mips => arch/mips/loongson64/loongson-3}/acpi_init.c (100%)
>
> diff --git a/arch/mips/loongson64/loongson-3/Makefile b/arch/mips/loongson64/loongson-3/Makefile
> index 622fead..44bc148 100644
> --- a/arch/mips/loongson64/loongson-3/Makefile
> +++ b/arch/mips/loongson64/loongson-3/Makefile
> @@ -1,7 +1,7 @@
>  #
>  # Makefile for Loongson-3 family machines
>  #
> -obj-y                  += irq.o cop2-ex.o platform.o
> +obj-y                  += irq.o cop2-ex.o platform.o acpi_init.o
>
>  obj-$(CONFIG_SMP)      += smp.o
>
> diff --git a/drivers/platform/mips/acpi_init.c b/arch/mips/loongson64/loongson-3/acpi_init.c
> similarity index 100%
> rename from drivers/platform/mips/acpi_init.c
> rename to arch/mips/loongson64/loongson-3/acpi_init.c
> diff --git a/drivers/platform/mips/Kconfig b/drivers/platform/mips/Kconfig
> index 125e569..b3ae30a 100644
> --- a/drivers/platform/mips/Kconfig
> +++ b/drivers/platform/mips/Kconfig
> @@ -15,10 +15,6 @@ menuconfig MIPS_PLATFORM_DEVICES
>
>  if MIPS_PLATFORM_DEVICES
>
> -config MIPS_ACPI
> -       bool
> -       default y if LOONGSON_MACH3X
> -
>  config CPU_HWMON
>         tristate "Loongson CPU HWMon Driver"
>         depends on LOONGSON_MACH3X
> diff --git a/drivers/platform/mips/Makefile b/drivers/platform/mips/Makefile
> index 4341284..8dfd039 100644
> --- a/drivers/platform/mips/Makefile
> +++ b/drivers/platform/mips/Makefile
> @@ -1,2 +1 @@
> -obj-$(CONFIG_MIPS_ACPI) += acpi_init.o
>  obj-$(CONFIG_CPU_HWMON) += cpu_hwmon.o
> --
> 2.4.6
>
>
>
>
>

Re: [PATCH V2 3/4] MIPS: Loongson: Introduce and use cpu_has_coherent_cache feature

[Huacai Chen]

Hi, Ralf,

Can this patch be merged? or does it have problems to be fix?

Huacai

On Wed, Oct 7, 2015 at 2:08 PM, Huacai Chen <chenhc@lemote.com> wrote:
> Loongson-3 maintains cache coherency by hardware. So we introduce a cpu
> feature named cpu_has_coherent_cache and use it to modify MIPS's cache
> flushing functions.
>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> Signed-off-by: Hongliang Tao <taohl@lemote.com>
> ---
>  arch/mips/Kconfig                                   |  3 +++
>  arch/mips/include/asm/cpu-features.h                |  3 +++
>  .../asm/mach-loongson64/cpu-feature-overrides.h     |  1 +
>  arch/mips/mm/c-r4k.c                                | 21 +++++++++++++++++++++
>  4 files changed, 28 insertions(+)
>
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 9322d26..3a8b7e5 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -1769,6 +1769,7 @@ config CPU_BMIPS5000
>  config SYS_HAS_CPU_LOONGSON3
>         bool
>         select CPU_SUPPORTS_CPUFREQ
> +       select CPU_SUPPORTS_COHERENT_CACHE
>
>  config SYS_HAS_CPU_LOONGSON2E
>         bool
> @@ -1950,6 +1951,8 @@ config CPU_SUPPORTS_HUGEPAGES
>         bool
>  config CPU_SUPPORTS_UNCACHED_ACCELERATED
>         bool
> +config CPU_SUPPORTS_COHERENT_CACHE
> +       bool
>  config MIPS_PGD_C0_CONTEXT
>         bool
>         default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
> diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
> index d1e04c9..565940e 100644
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -157,6 +157,9 @@
>  #ifndef cpu_has_pindexed_dcache
>  #define cpu_has_pindexed_dcache        (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
>  #endif
> +#ifndef cpu_has_coherent_cache
> +#define cpu_has_coherent_cache 0
> +#endif
>  #ifndef cpu_has_local_ebase
>  #define cpu_has_local_ebase    1
>  #endif
> diff --git a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
> index 98963c2..e0bef38 100644
> --- a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
> +++ b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
> @@ -57,5 +57,6 @@
>  #define cpu_has_local_ebase    0
>
>  #define cpu_has_wsbh           IS_ENABLED(CONFIG_CPU_LOONGSON3)
> +#define cpu_has_coherent_cache IS_ENABLED(CONFIG_CPU_SUPPORTS_COHERENT_CACHE)
>
>  #endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */
> diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
> index 5d3a25e..ed6e36e 100644
> --- a/arch/mips/mm/c-r4k.c
> +++ b/arch/mips/mm/c-r4k.c
> @@ -428,6 +428,9 @@ static void r4k_blast_scache_setup(void)
>
>  static inline void local_r4k___flush_cache_all(void * args)
>  {
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         switch (current_cpu_type()) {
>         case CPU_LOONGSON2:
>         case CPU_LOONGSON3:
> @@ -456,6 +459,9 @@ static inline void local_r4k___flush_cache_all(void * args)
>
>  static void r4k___flush_cache_all(void)
>  {
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         r4k_on_each_cpu(local_r4k___flush_cache_all, NULL);
>  }
>
> @@ -502,6 +508,9 @@ static void r4k_flush_cache_range(struct vm_area_struct *vma,
>  {
>         int exec = vma->vm_flags & VM_EXEC;
>
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc))
>                 r4k_on_each_cpu(local_r4k_flush_cache_range, vma);
>  }
> @@ -625,6 +634,9 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
>  {
>         struct flush_cache_page_args args;
>
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         args.vma = vma;
>         args.addr = addr;
>         args.pfn = pfn;
> @@ -634,11 +646,17 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
>
>  static inline void local_r4k_flush_data_cache_page(void * addr)
>  {
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         r4k_blast_dcache_page((unsigned long) addr);
>  }
>
>  static void r4k_flush_data_cache_page(unsigned long addr)
>  {
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         if (in_atomic())
>                 local_r4k_flush_data_cache_page((void *)addr);
>         else
> @@ -823,6 +841,9 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
>
>  static void r4k_flush_cache_sigtramp(unsigned long addr)
>  {
> +       if (cpu_has_coherent_cache)
> +               return;
> +
>         r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr);
>  }
>
> --
> 2.4.6
>
>
>
>
>