From: Kevin Wolf <kwolf@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Rabin Vincent <rabinv@axis.com>,
qemu-block@nongnu.org, qemu-trivial@nongnu.org,
Michael Tokarev <mjt@tls.msk.ru>,
qemu-stable@nongnu.org,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Peter Crosthwaite <crosthwaitepeter@gmail.com>,
Rabin Vincent <rabin.vincent@axis.com>
Subject: Re: [Qemu-trivial] [Qemu-devel] [PATCH] nand: fix address overflow
Date: Fri, 13 Nov 2015 12:04:34 +0100 [thread overview]
Message-ID: <20151113110434.GC4755@noname.redhat.com> (raw)
In-Reply-To: <727460710.12150402.1447407121726.JavaMail.zimbra@redhat.com>
Am 13.11.2015 um 10:32 hat Paolo Bonzini geschrieben:
> > > On 10/11/2015 14:25, Rabin Vincent wrote:
> > >> The shifts of the address mask and value shift beyond 32 bits when there
> > >> are 5 address cycles.
> > >>
> > >> Signed-off-by: Rabin Vincent <rabin.vincent@axis.com>
> > >> ---
> > >> hw/block/nand.c | 4 ++--
> > >> 1 file changed, 2 insertions(+), 2 deletions(-)
> > >>
> > >> diff --git a/hw/block/nand.c b/hw/block/nand.c
> > >> index 61d2cec..a68266f 100644
> > >> --- a/hw/block/nand.c
> > >> +++ b/hw/block/nand.c
> > >> @@ -522,8 +522,8 @@ void nand_setio(DeviceState *dev, uint32_t value)
> > >>
> > >> if (s->ale) {
> > >> unsigned int shift = s->addrlen * 8;
> > >> - unsigned int mask = ~(0xff << shift);
> > >> - unsigned int v = value << shift;
> > >> + uint64_t mask = ~(0xffull << shift);
> > >> + uint64_t v = (uint64_t)value << shift;
> > >>
> > >> s->addr = (s->addr & mask) | v;
> > >> s->addrlen ++;
> > >>
> > >
> > > Cc: qemu-trivial@nongnu.org
> > > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> >
> > Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> >
> > This is a bugfix right? IIUC This would not have worked for accesses
> > to devices above column address 255 at all. Should this go to
> > stable/2.5?
>
> Yes, it should. Michael, are you planning to send another pull
> request during hard freeze?
The block layer catch-all entry in MAINTAINERS says that it's mine, so
I'll just take it through my block tree.
Kevin
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Wolf <kwolf@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Rabin Vincent <rabinv@axis.com>,
qemu-block@nongnu.org, qemu-trivial@nongnu.org,
Michael Tokarev <mjt@tls.msk.ru>,
qemu-stable@nongnu.org,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Peter Crosthwaite <crosthwaitepeter@gmail.com>,
Rabin Vincent <rabin.vincent@axis.com>
Subject: Re: [Qemu-devel] [PATCH] nand: fix address overflow
Date: Fri, 13 Nov 2015 12:04:34 +0100 [thread overview]
Message-ID: <20151113110434.GC4755@noname.redhat.com> (raw)
In-Reply-To: <727460710.12150402.1447407121726.JavaMail.zimbra@redhat.com>
Am 13.11.2015 um 10:32 hat Paolo Bonzini geschrieben:
> > > On 10/11/2015 14:25, Rabin Vincent wrote:
> > >> The shifts of the address mask and value shift beyond 32 bits when there
> > >> are 5 address cycles.
> > >>
> > >> Signed-off-by: Rabin Vincent <rabin.vincent@axis.com>
> > >> ---
> > >> hw/block/nand.c | 4 ++--
> > >> 1 file changed, 2 insertions(+), 2 deletions(-)
> > >>
> > >> diff --git a/hw/block/nand.c b/hw/block/nand.c
> > >> index 61d2cec..a68266f 100644
> > >> --- a/hw/block/nand.c
> > >> +++ b/hw/block/nand.c
> > >> @@ -522,8 +522,8 @@ void nand_setio(DeviceState *dev, uint32_t value)
> > >>
> > >> if (s->ale) {
> > >> unsigned int shift = s->addrlen * 8;
> > >> - unsigned int mask = ~(0xff << shift);
> > >> - unsigned int v = value << shift;
> > >> + uint64_t mask = ~(0xffull << shift);
> > >> + uint64_t v = (uint64_t)value << shift;
> > >>
> > >> s->addr = (s->addr & mask) | v;
> > >> s->addrlen ++;
> > >>
> > >
> > > Cc: qemu-trivial@nongnu.org
> > > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> >
> > Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> >
> > This is a bugfix right? IIUC This would not have worked for accesses
> > to devices above column address 255 at all. Should this go to
> > stable/2.5?
>
> Yes, it should. Michael, are you planning to send another pull
> request during hard freeze?
The block layer catch-all entry in MAINTAINERS says that it's mine, so
I'll just take it through my block tree.
Kevin
next prev parent reply other threads:[~2015-11-13 11:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-10 13:25 [Qemu-devel] [PATCH] nand: fix address overflow Rabin Vincent
2015-11-10 15:09 ` [Qemu-trivial] " Paolo Bonzini
2015-11-10 15:09 ` [Qemu-devel] " Paolo Bonzini
2015-11-13 4:23 ` [Qemu-trivial] " Peter Crosthwaite
2015-11-13 4:23 ` Peter Crosthwaite
2015-11-13 9:32 ` [Qemu-trivial] " Paolo Bonzini
2015-11-13 9:32 ` Paolo Bonzini
2015-11-13 11:04 ` Kevin Wolf [this message]
2015-11-13 11:04 ` Kevin Wolf
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