From: Mika Westerberg <mika.westerberg@intel.com>
To: Qipeng Zha <qipeng.zha@intel.com>
Cc: linux-gpio@vger.kernel.org, linus.walleij@linaro.org, qi.zheng@intel.com
Subject: Re: [PATCH V3 2/2] pinctrl: intel: fix bug of register offset calculation
Date: Wed, 25 Nov 2015 16:14:36 +0200 [thread overview]
Message-ID: <20151125141436.GA1587@lahna.fi.intel.com> (raw)
In-Reply-To: <1448471391-1115-2-git-send-email-qipeng.zha@intel.com>
On Thu, Nov 26, 2015 at 01:09:51AM +0800, Qipeng Zha wrote:
> The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
> GPI_IE, are not 24 for Broxton, Add a parameter to allow
> different platform to set correct value.
>
> ---
> change in v3:
> use community->gpp_size directly, not macro.
>
> change in v2:
> define gpp_size for sunrisepoint in its private structure.
>
> Signed-off-by: Qi Zheng <qi.zheng@intel.com>
> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
My previous ack still applies to this patch.
next prev parent reply other threads:[~2015-11-25 14:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-25 17:09 [PATCH V3 1/2] pinctrl: intel: fix offset calculation issue of register PAD_OWN Qipeng Zha
2015-11-25 10:03 ` Mika Westerberg
2015-11-25 17:09 ` [PATCH V3 2/2] pinctrl: intel: fix bug of register offset calculation Qipeng Zha
2015-11-25 14:14 ` Mika Westerberg [this message]
2015-12-01 10:16 ` Linus Walleij
2015-12-10 9:04 ` Westerberg, Mika
2015-12-10 21:58 ` Linus Walleij
2015-12-11 8:02 ` Westerberg, Mika
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