Re: [PATCH V3 2/2] pinctrl: intel: fix bug of register offset calculation

["Westerberg, Mika" <mika.westerberg@intel.com>]

On Thu, Dec 10, 2015 at 10:58:44PM +0100, Linus Walleij wrote:
> On Thu, Dec 10, 2015 at 10:04 AM, Westerberg, Mika
> <mika.westerberg@intel.com> wrote:
> > On Tue, Dec 01, 2015 at 11:16:45AM +0100, Linus Walleij wrote:
> >> On Wed, Nov 25, 2015 at 6:09 PM, Qipeng Zha <qipeng.zha@intel.com> wrote:
> >>
> >> > The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
> >> > GPI_IE, are not 24 for Broxton, Add a parameter to allow
> >> > different platform to set correct value.
> >> >
> >> > ---
> >> > change in v3:
> >> >  use community->gpp_size directly, not macro.
> >> >
> >> > change in v2:
> >> >  define gpp_size for sunrisepoint in its private structure.
> >> >
> >> > Signed-off-by: Qi Zheng <qi.zheng@intel.com>
> >> > Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
> >>
> >> Patch applied. For 4.5 since I can't figure out if this is
> >> a regression or not.
> >
> > Broxton support was added in v4.4 so it would be nice if these patches
> > could get still into v4.4.
> 
> Yeah I queued it for fixes, but missed to apply 1/2, fixing it up now.

Thanks!