From: Vinod Koul <vinod.koul@intel.com>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: nsekhar@ti.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
tony@atomide.com, r.schwebel@pengutronix.de
Subject: Re: [PATCH v2 0/3] dmaengine: ti-dma-crossbar: channel reserving and edma3-tpcc support
Date: Mon, 30 Nov 2015 20:48:06 +0530 [thread overview]
Message-ID: <20151130151806.GE3901@localhost> (raw)
In-Reply-To: <1446192038-11158-1-git-send-email-peter.ujfalusi@ti.com>
On Fri, Oct 30, 2015 at 10:00:35AM +0200, Peter Ujfalusi wrote:
> Hi,
>
> Changes since v1:
> - Fixed issue introduced by the bitops patch: wrong error check, also switch to
> use find_first_zero_bit() instead of find_next_zero_bit()
>
> Cover letter:
>
> This series depends on the eDMA work I have done, which has been now applied:
> https://lkml.org/lkml/2015/10/16/64
>
> DRA7 family of chips have both sDMA and eDMA. Currently only sDMA can be used
> becasue the old driver stack for eDMA did not allowed integration w/o hacks.
>
> Due to the nature of eDMA the crossbar needs to know which eDMA events it can
> use to map incoming events towards the eDMA. In eDMA a channel is wired to be
> used with one specific event. For example eDMA event 14 can only be handled by
> eDMA channel 14.
> The eDMA itself can be shared by different processors in the system (ARM, DSP,
> etc) and since ARM/Linux is the master we need to know which channels are used
> by other cores. Also we need to mask out channels used for memcpy from the
> events we use for HW triggers.
Applied, thanks
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/3] dmaengine: ti-dma-crossbar: channel reserving and edma3-tpcc support
Date: Mon, 30 Nov 2015 20:48:06 +0530 [thread overview]
Message-ID: <20151130151806.GE3901@localhost> (raw)
In-Reply-To: <1446192038-11158-1-git-send-email-peter.ujfalusi@ti.com>
On Fri, Oct 30, 2015 at 10:00:35AM +0200, Peter Ujfalusi wrote:
> Hi,
>
> Changes since v1:
> - Fixed issue introduced by the bitops patch: wrong error check, also switch to
> use find_first_zero_bit() instead of find_next_zero_bit()
>
> Cover letter:
>
> This series depends on the eDMA work I have done, which has been now applied:
> https://lkml.org/lkml/2015/10/16/64
>
> DRA7 family of chips have both sDMA and eDMA. Currently only sDMA can be used
> becasue the old driver stack for eDMA did not allowed integration w/o hacks.
>
> Due to the nature of eDMA the crossbar needs to know which eDMA events it can
> use to map incoming events towards the eDMA. In eDMA a channel is wired to be
> used with one specific event. For example eDMA event 14 can only be handled by
> eDMA channel 14.
> The eDMA itself can be shared by different processors in the system (ARM, DSP,
> etc) and since ARM/Linux is the master we need to know which channels are used
> by other cores. Also we need to mask out channels used for memcpy from the
> events we use for HW triggers.
Applied, thanks
--
~Vinod
next prev parent reply other threads:[~2015-11-30 15:18 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-30 8:00 [PATCH v2 0/3] dmaengine: ti-dma-crossbar: channel reserving and edma3-tpcc support Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-10-30 8:00 ` [PATCH v2 1/3] dmaengine: ti-dma-crossbar: dra7: Use bitops instead of idr Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-10-30 8:00 ` [PATCH v2 2/3] dmaengine: ti-dma-crossbar: dra7: Support for reserving DMA event ranges Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-11-06 21:53 ` Rob Herring
2015-11-06 21:53 ` Rob Herring
2015-11-09 8:28 ` Peter Ujfalusi
2015-11-09 8:28 ` Peter Ujfalusi
2015-11-09 8:28 ` Peter Ujfalusi
2015-10-30 8:00 ` [PATCH v2 3/3] dmaengine: ti-dma-crossbar: dra7: Support for eDMA with new bindings Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-10-30 8:00 ` Peter Ujfalusi
2015-11-30 15:18 ` Vinod Koul [this message]
2015-11-30 15:18 ` [PATCH v2 0/3] dmaengine: ti-dma-crossbar: channel reserving and edma3-tpcc support Vinod Koul
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151130151806.GE3901@localhost \
--to=vinod.koul@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=dmaengine@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=nsekhar@ti.com \
--cc=peter.ujfalusi@ti.com \
--cc=r.schwebel@pengutronix.de \
--cc=tony@atomide.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.