From: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Anton Bondarenko
<anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
b38343-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
vladimir_zapolskiy-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org,
jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH v5 08/11] spi: imx: allow only WML aligned transfers to use DMA
Date: Mon, 7 Dec 2015 10:42:24 +0100 [thread overview]
Message-ID: <20151207094224.GC11966@pengutronix.de> (raw)
In-Reply-To: <1449334629-4715-9-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Sat, Dec 05, 2015 at 05:57:06PM +0100, Anton Bondarenko wrote:
> RX DMA tail data handling doesn't work correctly in many cases with current
> implementation. It happens because SPI core was setup to generates both RX
> and RX TAIL events. And RX TAIL event does not work correctly.
> This can be easily verified by sending SPI transaction with size modulus
> WML(32 in our case) not equal 0.
>
> Also removing change introduced in f6ee9b582d2db652497b73c1f117591dfb6d3a90
> since this change only fix usecases with transfer size from 33 to 128 bytes
> and does not fix 129 bytes etc.
>
> This is output from transaction with len 138 bytes in loopback mode at 10Mhz:
> TX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2
> TX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75
> TX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95
> TX0030: 5f 3c 35 b5 c4 8c dd 6c 11 32 3d e2 b4 b4 59 cf
> TX0040: ce 23 3d 27 df a7 f9 96 fc 1e e0 66 2c 0e 7b 8c
> TX0050: ca 30 42 8f bc 9f 7b ce d1 b8 b1 87 ec 8a d6 bb
> TX0060: 2e 15 63 0e 3c dc a4 3a 7a 06 20 a7 93 1b 34 dd
> TX0070: 4c f5 ec 88 96 68 d6 68 a0 09 6f 8e 93 47 c9 41
> TX0080: db ac cf 97 89 f3 51 05 79 71
>
> RX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2
> RX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75
> RX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95
> RX0030: 5f 3c 35 00 00 b5 00 00 00 c4 00 00 8c 00 00 dd
> RX0040: 6c 11 32 3d e2 b4 b4 59 cf ce 23 3d 27 df a7 f9
> RX0050: 96 fc 1e e0 66 2c 0e 7b 8c ca 30 42 8f 1f 1f bc
> RX0060: 9f 7b ce d1 b8 b1 87 ec 8a d6 bb 2e 15 63 0e ed
> RX0070: ed 3c 58 58 58 dc 3d 3d a4 6a 6a 3a 52 52 7a 36
> RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
>
> Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
> if DMA RX read was triggered by RX event. This mean DMA was triggered
> by RX TAIL event.
>
> Signed-off-by: Anton Bondarenko <anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> drivers/spi/spi-imx.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
> index fa24637..7a68c62 100644
> --- a/drivers/spi/spi-imx.c
> +++ b/drivers/spi/spi-imx.c
> @@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
> {
> struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
>
> - if (spi_imx->dma_is_inited &&
> - transfer->len > spi_imx->wml * sizeof(u32))
> + if (spi_imx->dma_is_inited && transfer->len > spi_imx->wml &&
> + (transfer->len % spi_imx->wml) == 0)
> return true;
Must transfer->len really be bigger than spi_imx->wml? I would assume it
should be >= instead. And where is the * sizeof(u32) gone? If that's
unnecessary I heven't understood why.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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WARNING: multiple messages have this Message-ID (diff)
From: s.hauer@pengutronix.de (Sascha Hauer)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 08/11] spi: imx: allow only WML aligned transfers to use DMA
Date: Mon, 7 Dec 2015 10:42:24 +0100 [thread overview]
Message-ID: <20151207094224.GC11966@pengutronix.de> (raw)
In-Reply-To: <1449334629-4715-9-git-send-email-anton.bondarenko.sama@gmail.com>
On Sat, Dec 05, 2015 at 05:57:06PM +0100, Anton Bondarenko wrote:
> RX DMA tail data handling doesn't work correctly in many cases with current
> implementation. It happens because SPI core was setup to generates both RX
> and RX TAIL events. And RX TAIL event does not work correctly.
> This can be easily verified by sending SPI transaction with size modulus
> WML(32 in our case) not equal 0.
>
> Also removing change introduced in f6ee9b582d2db652497b73c1f117591dfb6d3a90
> since this change only fix usecases with transfer size from 33 to 128 bytes
> and does not fix 129 bytes etc.
>
> This is output from transaction with len 138 bytes in loopback mode at 10Mhz:
> TX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2
> TX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75
> TX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95
> TX0030: 5f 3c 35 b5 c4 8c dd 6c 11 32 3d e2 b4 b4 59 cf
> TX0040: ce 23 3d 27 df a7 f9 96 fc 1e e0 66 2c 0e 7b 8c
> TX0050: ca 30 42 8f bc 9f 7b ce d1 b8 b1 87 ec 8a d6 bb
> TX0060: 2e 15 63 0e 3c dc a4 3a 7a 06 20 a7 93 1b 34 dd
> TX0070: 4c f5 ec 88 96 68 d6 68 a0 09 6f 8e 93 47 c9 41
> TX0080: db ac cf 97 89 f3 51 05 79 71
>
> RX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2
> RX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75
> RX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95
> RX0030: 5f 3c 35 00 00 b5 00 00 00 c4 00 00 8c 00 00 dd
> RX0040: 6c 11 32 3d e2 b4 b4 59 cf ce 23 3d 27 df a7 f9
> RX0050: 96 fc 1e e0 66 2c 0e 7b 8c ca 30 42 8f 1f 1f bc
> RX0060: 9f 7b ce d1 b8 b1 87 ec 8a d6 bb 2e 15 63 0e ed
> RX0070: ed 3c 58 58 58 dc 3d 3d a4 6a 6a 3a 52 52 7a 36
> RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
>
> Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
> if DMA RX read was triggered by RX event. This mean DMA was triggered
> by RX TAIL event.
>
> Signed-off-by: Anton Bondarenko <anton.bondarenko.sama@gmail.com>
> ---
> drivers/spi/spi-imx.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
> index fa24637..7a68c62 100644
> --- a/drivers/spi/spi-imx.c
> +++ b/drivers/spi/spi-imx.c
> @@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
> {
> struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
>
> - if (spi_imx->dma_is_inited &&
> - transfer->len > spi_imx->wml * sizeof(u32))
> + if (spi_imx->dma_is_inited && transfer->len > spi_imx->wml &&
> + (transfer->len % spi_imx->wml) == 0)
> return true;
Must transfer->len really be bigger than spi_imx->wml? I would assume it
should be >= instead. And where is the * sizeof(u32) gone? If that's
unnecessary I heven't understood why.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Anton Bondarenko <anton.bondarenko.sama@gmail.com>
Cc: broonie@kernel.org, b38343@freescale.com,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
vladimir_zapolskiy@mentor.com, jiada_wang@mentor.com
Subject: Re: [PATCH v5 08/11] spi: imx: allow only WML aligned transfers to use DMA
Date: Mon, 7 Dec 2015 10:42:24 +0100 [thread overview]
Message-ID: <20151207094224.GC11966@pengutronix.de> (raw)
In-Reply-To: <1449334629-4715-9-git-send-email-anton.bondarenko.sama@gmail.com>
On Sat, Dec 05, 2015 at 05:57:06PM +0100, Anton Bondarenko wrote:
> RX DMA tail data handling doesn't work correctly in many cases with current
> implementation. It happens because SPI core was setup to generates both RX
> and RX TAIL events. And RX TAIL event does not work correctly.
> This can be easily verified by sending SPI transaction with size modulus
> WML(32 in our case) not equal 0.
>
> Also removing change introduced in f6ee9b582d2db652497b73c1f117591dfb6d3a90
> since this change only fix usecases with transfer size from 33 to 128 bytes
> and does not fix 129 bytes etc.
>
> This is output from transaction with len 138 bytes in loopback mode at 10Mhz:
> TX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2
> TX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75
> TX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95
> TX0030: 5f 3c 35 b5 c4 8c dd 6c 11 32 3d e2 b4 b4 59 cf
> TX0040: ce 23 3d 27 df a7 f9 96 fc 1e e0 66 2c 0e 7b 8c
> TX0050: ca 30 42 8f bc 9f 7b ce d1 b8 b1 87 ec 8a d6 bb
> TX0060: 2e 15 63 0e 3c dc a4 3a 7a 06 20 a7 93 1b 34 dd
> TX0070: 4c f5 ec 88 96 68 d6 68 a0 09 6f 8e 93 47 c9 41
> TX0080: db ac cf 97 89 f3 51 05 79 71
>
> RX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2
> RX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75
> RX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95
> RX0030: 5f 3c 35 00 00 b5 00 00 00 c4 00 00 8c 00 00 dd
> RX0040: 6c 11 32 3d e2 b4 b4 59 cf ce 23 3d 27 df a7 f9
> RX0050: 96 fc 1e e0 66 2c 0e 7b 8c ca 30 42 8f 1f 1f bc
> RX0060: 9f 7b ce d1 b8 b1 87 ec 8a d6 bb 2e 15 63 0e ed
> RX0070: ed 3c 58 58 58 dc 3d 3d a4 6a 6a 3a 52 52 7a 36
> RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec
>
> Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible
> if DMA RX read was triggered by RX event. This mean DMA was triggered
> by RX TAIL event.
>
> Signed-off-by: Anton Bondarenko <anton.bondarenko.sama@gmail.com>
> ---
> drivers/spi/spi-imx.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
> index fa24637..7a68c62 100644
> --- a/drivers/spi/spi-imx.c
> +++ b/drivers/spi/spi-imx.c
> @@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
> {
> struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
>
> - if (spi_imx->dma_is_inited &&
> - transfer->len > spi_imx->wml * sizeof(u32))
> + if (spi_imx->dma_is_inited && transfer->len > spi_imx->wml &&
> + (transfer->len % spi_imx->wml) == 0)
> return true;
Must transfer->len really be bigger than spi_imx->wml? I would assume it
should be >= instead. And where is the * sizeof(u32) gone? If that's
unnecessary I heven't understood why.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
next prev parent reply other threads:[~2015-12-07 9:42 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-05 16:56 [PATCH v5 00/11] Improvements for SPI IMX driver for Freescale IMX51, IMX53 and IMX6 Anton Bondarenko
2015-12-05 16:56 ` Anton Bondarenko
2015-12-05 16:56 ` Anton Bondarenko
2015-12-05 16:56 ` [PATCH v5 01/11] spi: imx: terminate RX DMA transaction in case of TX DMA timeout Anton Bondarenko
2015-12-05 16:56 ` Anton Bondarenko
2015-12-05 16:56 ` Anton Bondarenko
[not found] ` <1449334629-4715-2-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: terminate RX DMA transaction in case of TX DMA timeout" to the spi tree Mark Brown
[not found] ` <1449334629-4715-1-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-05 16:57 ` [PATCH v5 02/11] spi: imx: reorder HW operations enable order to avoid possible RX data loss Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
[not found] ` <1449334629-4715-3-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: reorder HW operations enable order to avoid possible RX data loss" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 05/11] spi: imx: Add support for loopback for ECSPI controllers Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
[not found] ` <1449334629-4715-6-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 9:27 ` Sascha Hauer
2015-12-07 9:27 ` Sascha Hauer
2015-12-07 9:27 ` Sascha Hauer
[not found] ` <20151207092747.GA11966-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-12-07 21:58 ` Anton Bondarenko
2015-12-07 21:58 ` Anton Bondarenko
2015-12-07 21:58 ` Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 03/11] spi: imx: replace multiple watermarks with single for RX, TX and RXT Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
[not found] ` <1449334629-4715-4-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: replace multiple watermarks with single for RX, TX and RXT" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 04/11] spi: imx: add function to check for IMX51 family controller Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
[not found] ` <1449334629-4715-5-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: add function to check for IMX51 family controller" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 06/11] spi: imx: return error from dma channel request Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
2015-12-07 9:32 ` Sascha Hauer
2015-12-07 9:32 ` Sascha Hauer
2015-12-07 23:38 ` Anton Bondarenko
2015-12-07 23:38 ` Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 07/11] spi: imx: defer spi initialization, if DMA engine is Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
[not found] ` <1449334629-4715-8-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-15 22:41 ` Applied "spi: imx: defer spi initialization, if DMA engine is" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 08/11] spi: imx: allow only WML aligned transfers to use DMA Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
[not found] ` <1449334629-4715-9-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 9:42 ` Sascha Hauer [this message]
2015-12-07 9:42 ` Sascha Hauer
2015-12-07 9:42 ` Sascha Hauer
[not found] ` <20151207094224.GC11966-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-12-08 0:33 ` Anton Bondarenko
2015-12-08 0:33 ` Anton Bondarenko
2015-12-08 0:33 ` Anton Bondarenko
2015-12-08 6:05 ` Sascha Hauer
2015-12-08 6:05 ` Sascha Hauer
2015-12-05 16:57 ` [PATCH v5 09/11] spi: imx: remove dead RX DMA tail handling code Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 10/11] spi: imx: replace fixed timeout with calculated Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 11/11] spi: imx: add support for all SPI word width for DMA Anton Bondarenko
2015-12-05 16:57 ` Anton Bondarenko
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