From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/10] drm/i915: Write out crc frame counts in hex
Date: Wed, 16 Dec 2015 12:58:33 +0200 [thread overview]
Message-ID: <20151216105833.GX4437@intel.com> (raw)
In-Reply-To: <20151216102354.GV30437@phenom.ffwll.local>
On Wed, Dec 16, 2015 at 11:23:54AM +0100, Daniel Vetter wrote:
> On Mon, Dec 14, 2015 at 06:23:42PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The crc code assumes that the printed frame counter value takes
> > exactly 8 characters. The counter is a 32bit value, so to fit
> > it into 8 characters we need to print it in hex, in decimal it
> > would take 10 characters.
> >
> > This obviously needs a corresponding change in intel-gpu-tools.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> ugh, and we hardcode the same %8u on the igt side. What about instead
> changing igt to just parse for an %u, push that, then change the kernel to
> dump a %u without length? With a few months in between.
>
> At least some backwards compat must be there, otherwise bisecting will be
> slightly painful.
So the other idea I had was to limit the counter to 24 bits always. That
would avoid having to change the printf format string at all, and it
would gives us a consistent wraparound behaviour (since gen3/4 frame
counter is only 24 bits).
> -Daniel
>
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> > index 24318b79bcfc..96d6e5de0811 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -3518,7 +3518,7 @@ i915_pipe_crc_read(struct file *filep, char __user *user_buf, size_t count,
> > pipe_crc->tail = (pipe_crc->tail + 1) & (INTEL_PIPE_CRC_ENTRIES_NR - 1);
> >
> > bytes_read += snprintf(buf, PIPE_CRC_BUFFER_LEN,
> > - "%8u %8x %8x %8x %8x %8x\n",
> > + "%8x %8x %8x %8x %8x %8x\n",
> > entry->frame, entry->crc[0],
> > entry->crc[1], entry->crc[2],
> > entry->crc[3], entry->crc[4]);
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-12-16 11:07 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-14 16:23 [PATCH 00/10] drm/i915: Fixes from my attempt at running igt on gen2 ville.syrjala
2015-12-14 16:23 ` [PATCH 01/10] drm/i915: Release mmaps on partial ggtt vma unbind ville.syrjala
2015-12-14 17:01 ` Chris Wilson
2015-12-14 17:26 ` Ville Syrjälä
2015-12-14 16:23 ` [PATCH 02/10] drm/i915: Cleanup phys status page too ville.syrjala
2015-12-14 17:04 ` Chris Wilson
2016-01-11 18:48 ` [PATCH v2 " ville.syrjala
2016-01-12 10:00 ` Daniel Vetter
2015-12-14 16:23 ` [PATCH 03/10] drm/i915: Write out crc frame counts in hex ville.syrjala
2015-12-16 10:23 ` Daniel Vetter
2015-12-16 10:58 ` Ville Syrjälä [this message]
2015-12-16 11:09 ` Daniel Vetter
2015-12-14 16:23 ` [PATCH 04/10] drm/i915: Wait for pipe to start before sampling vblank timestamps on gen2 ville.syrjala
2015-12-16 10:25 ` Daniel Vetter
2015-12-14 16:23 ` [PATCH 05/10] drm/i915: Use drm_vblank_count() on gen2 for crc frame count ville.syrjala
2015-12-16 10:30 ` Daniel Vetter
2015-12-16 12:51 ` Ville Syrjälä
2015-12-16 15:28 ` Daniel Vetter
2015-12-16 17:22 ` Ville Syrjälä
2015-12-21 11:54 ` Daniel Vetter
2015-12-14 16:23 ` [PATCH 06/10] drm/i915: Enable vblank_disable_immediate on gen2 ville.syrjala
2015-12-16 10:31 ` Daniel Vetter
2015-12-16 10:41 ` Chris Wilson
2015-12-14 16:23 ` [PATCH 07/10] drm/i915: Allow 27 bytes child_dev for VBT <109 ville.syrjala
2015-12-16 8:58 ` Jani Nikula
2015-12-14 16:23 ` [PATCH 08/10] drm/i915: Expect child dev size of 22 bytes for VBT < 106 ville.syrjala
2015-12-16 8:58 ` Jani Nikula
2015-12-14 16:23 ` [PATCH 09/10] drm/i915: Reject < 8 byte batches on 830/845 ville.syrjala
2015-12-14 17:07 ` Chris Wilson
2015-12-14 17:29 ` Ville Syrjälä
2015-12-16 10:36 ` Daniel Vetter
2015-12-16 10:43 ` Chris Wilson
2015-12-16 10:50 ` Daniel Vetter
2015-12-14 16:23 ` [PATCH 10/10] drm/i915: Use MI_BATCH_BUFFER_START " ville.syrjala
2015-12-14 16:58 ` Chris Wilson
2015-12-14 17:25 ` Ville Syrjälä
2015-12-15 10:09 ` Chris Wilson
2015-12-15 10:24 ` Chris Wilson
2015-12-15 11:05 ` Ville Syrjälä
2015-12-15 11:22 ` Chris Wilson
2015-12-15 11:43 ` Ville Syrjälä
2016-01-12 7:49 ` ✗ failure: Fi.CI.BAT Patchwork
2016-01-12 14:54 ` [PATCH 00/10] drm/i915: Fixes from my attempt at running igt on gen2 Ville Syrjälä
2016-01-12 16:02 ` Daniel Vetter
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