Re: [PATCH 05/10] drm/i915: Use drm_vblank_count() on gen2 for crc frame count

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 05/10] drm/i915: Use drm_vblank_count() on gen2 for crc frame count
Date: Wed, 16 Dec 2015 19:22:25 +0200	[thread overview]
Message-ID: <20151216172225.GH4437@intel.com> (raw)
In-Reply-To: <20151216152836.GQ30437@phenom.ffwll.local>

On Wed, Dec 16, 2015 at 04:28:36PM +0100, Daniel Vetter wrote:
> On Wed, Dec 16, 2015 at 02:51:20PM +0200, Ville Syrjälä wrote:
> > On Wed, Dec 16, 2015 at 11:30:19AM +0100, Daniel Vetter wrote:
> > > On Mon, Dec 14, 2015 at 06:23:44PM +0200, ville.syrjala@linux.intel.com wrote:
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > 
> > > > Gen2 doesn't have a hardware frame counter, so let's use the sw
> > > > counter value instead.
> > > > 
> > > > Testcase: igt/kms_pipe_crc_basic/read-crc-pipe-?-frame-sequence
> > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > I think the better test is skip the testcase if all frame numbers are 0.
> > > Not sure it's worth it to hack this up.
> > 
> > What's the problem with it? A few extra lines of code?
> 
> Well the idea of sampling the hw irq counter is that we'd notice when we
> start missing something. Sampling the baked vblank counter isn't really
> useful in that regard I think.

I think only if we'd also miss the vblank interrupt somehow.

> 
> Otoh we could just sample the official vblank counter, and then a test
> could schedule a flip for a given frame and check that the crc changes at
> the right frame (using continuous sampling). That would indeed be useful.

That's a decent point. Maybe we would want to expose both counters
actually and nag if they don't match? That sort of thing could be useful
just to validate the vblank code too, but we don't have any interface
to expose the hw counter alongside the sw counter for that purpose.

> This here just looks like a few random changes to appease a fairly
> arbitrary testcase.
> -Daniel
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

-- 
Ville Syrjälä
Intel OTC
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