[U-Boot] [RFC] igep00x0: UBI everywhere but SPL

[U-Boot] [RFC] igep00x0: UBI everywhere but SPL

[Ladislav Michl]

This patch converts IGEP board to use UBI volumes for environment, u-boot,
kernel... With exception of first four sectors with SPL loaded by SoC boot
ROM whole NAND is UBI managed. I misused BOOT_DEVICE_BOARD, which is probably
not briliant idea, but works well enough. Also code it too big, so I dropped
CONFIG_SPL_EXT_SUPPORT to make it fit. It is meant more likely as a test
of Thomas' patch, so more people can play with that.
Thanks to Marek Vasut for pointing me to Thomas' work and arguing so well
towards UBI that I had no other choice than giving it a try.

---
diff --git a/arch/arm/include/asm/arch-omap3/spl.h b/arch/arm/include/asm/arch-omap3/spl.h
index a31b4ea..ebac396 100644
--- a/arch/arm/include/asm/arch-omap3/spl.h
+++ b/arch/arm/include/asm/arch-omap3/spl.h
@@ -14,9 +14,10 @@
 #define BOOT_DEVICE_MMC2	0x05
 #define BOOT_DEVICE_MMC1	0x06
 #define BOOT_DEVICE_XIPWAIT	0x07
-#define BOOT_DEVICE_MMC2_2      0x08
+#define BOOT_DEVICE_MMC2_2	0x08
 #define BOOT_DEVICE_UART	0x10
 #define BOOT_DEVICE_USB		0x11
+#define BOOT_DEVICE_BOARD	0xffffffff
 
 #define MMC_BOOT_DEVICES_START	BOOT_DEVICE_MMC2
 #define MMC_BOOT_DEVICES_END	BOOT_DEVICE_MMC1
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index e2fce50..4c4394f 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -10,6 +10,9 @@
 #include <ns16550.h>
 #include <twl4030.h>
 #include <netdev.h>
+#include <nand.h>
+#include <ubispl.h>
+#include <spl.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
@@ -212,3 +215,64 @@ int board_eth_init(bd_t *bis)
 #endif
 }
 #endif
+
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_start_uboot(void)
+{
+	/* break into full u-boot on 'c' */
+	if (serial_tstc() && serial_getc() == 'c')
+		return 1;
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_BOARD_LOAD_IMAGE)
+
+#define SPL_FINFO_ADDR		0x88800000
+#define SPL_FTD_LOAD_ADDR	0x88000000 /* fdtaddr=0x88000000 */
+#define SPL_LOAD_ADDR		0x82000000 /* loadaddr=0x82000000 */
+
+int spl_board_load_image(void)
+{
+	int ret;
+	struct image_header *header;
+	struct ubispl_info info;
+	struct ubispl_load volumes[4];
+
+	info.ubi = (struct ubi_scan_info *) SPL_FINFO_ADDR;
+	info.fastmap = 1;
+	info.read = nand_spl_read_flash;
+
+	info.peb_offset = 4;
+	info.peb_size = CONFIG_SYS_NAND_BLOCK_SIZE;
+	info.vid_offset = 512;
+	info.leb_start = 2048;
+	info.peb_count = 4096 - info.peb_offset;
+
+	header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+	memset(volumes, 0, sizeof(volumes));
+	volumes[0].name = "loader";
+	volumes[0].vol_id = 3;
+	volumes[0].load_addr = (void *)header;
+
+	nand_init();
+	ret = ubispl_load_volumes(&info, volumes, 1);
+	nand_deselect();
+	if (ret)
+		return ret;
+
+	spl_parse_image_header(header);
+	return 0;
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	spl_boot_list[0] = BOOT_DEVICE_BOARD;
+}
+
+void spl_board_announce_boot_device(void)
+{
+	puts("UBI volume");
+}
+#endif
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 3e2c074..f55be5f 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -10,6 +10,13 @@
 #include <asm/io.h>
 #include <nand.h>
 
+#ifdef CONFIG_SPL_BOARD_LOAD_IMAGE
+int spl_nand_load_image(void)
+{
+	return -EINVAL;
+}
+#else
+
 #if defined(CONFIG_SPL_NAND_RAW_ONLY)
 int spl_nand_load_image(void)
 {
@@ -102,3 +109,4 @@ int spl_nand_load_image(void)
 	return err;
 }
 #endif
+#endif
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index a64b38f..c18df59 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -80,6 +80,7 @@
 #endif
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_UBI
 
 #ifndef CONFIG_SPL_BUILD
 
@@ -89,6 +90,10 @@
 	"stdout=serial\0" \
 	"stderr=serial\0"
 
+#define ENV_MTD_SETTINGS \
+	"mtdids=nand0=gpmc-nand.0\0" \
+	"mtdparts=mtdparts=gpmc-nand.0:512k(SPL),-(UBI)\0"
+
 #define MEM_LAYOUT_SETTINGS \
 	DEFAULT_LINUX_BOOT_ENV \
 	"scriptaddr=0x87E00000\0" \
@@ -102,33 +107,13 @@
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_DEVICE_SETTINGS \
+	ENV_MTD_SETTINGS \
 	MEM_LAYOUT_SETTINGS \
 	BOOTENV
 
 #endif
 
 /*
- * FLASH and environment organization
- */
-
-#ifdef CONFIG_BOOT_ONENAND
-#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
-
-#define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
-
-#define CONFIG_ENV_IS_IN_ONENAND	1
-#define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
-#define CONFIG_ENV_ADDR			ONENAND_ENV_OFFSET
-#endif
-
-#ifdef CONFIG_NAND
-#define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
-#define CONFIG_ENV_IS_IN_NAND	        1
-#define CONFIG_ENV_SIZE			(512 << 10) /* Total Size Environment */
-#define CONFIG_ENV_ADDR			NAND_ENV_OFFSET
-#endif
-
-/*
  * SMSC911x Ethernet
  */
 #if defined(CONFIG_CMD_NET)
@@ -137,15 +122,34 @@
 #define CONFIG_SMC911X_BASE		0x2C000000
 #endif /* (CONFIG_CMD_NET) */
 
+/*
+ * FLASH and environment organization
+ */
+#define CONFIG_SPL_UBI			1
+#define CONFIG_SPL_UBI_MAX_VOL_LEBS	256
+#define CONFIG_SPL_UBI_MAX_PEB_SIZE	(256*1024)
+#define CONFIG_SPL_UBI_MAX_PEBS		4096
+#define CONFIG_SPL_UBI_VOL_IDS		8
+
+#define CONFIG_SPL_BOARD_LOAD_IMAGE
+
+#define CONFIG_ENV_IS_IN_UBI		1
+#define CONFIG_ENV_UBI_PART		"UBI"
+#define CONFIG_ENV_UBI_VOLUME		"config"
+#define CONFIG_ENV_UBI_VOLUME_REDUND	"config_r"
+/*#define CONFIG_UBI_SILENCE_MSG		1
+#define CONFIG_UBIFS_SILENCE_MSG	1*/
+#define CONFIG_ENV_SIZE			(32*1024)
+
+#define CONFIG_RBTREE
+#define CONFIG_MTD_PARTITIONS
+#define MTDIDS_DEFAULT			"nand0=gpmc-nand.0"
+#define MTDPARTS_DEFAULT		"mtdparts=gpmc-nand.0:512k(SPL),-(UBI)"
+
 /* OneNAND boot config */
 #ifdef CONFIG_BOOT_ONENAND
-#define CONFIG_SPL_ONENAND_SUPPORT
-#define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
+#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
 #define CONFIG_SYS_ONENAND_PAGE_SIZE	2048
-#define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
-#define CONFIG_SPL_ONENAND_LOAD_SIZE    \
-	(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
-
 #endif
 
 /* NAND boot config */
@@ -169,14 +173,6 @@
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_BCH
-
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
-/* NAND: SPL falcon mode configs */
-#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS		0x240000
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
-#endif
 #endif
 
 #endif /* __IGEP00X0_H */