[PATCH v6 0/3] drm/i915: Disable link training optimization if DP config has changed

[PATCH v6 0/3] drm/i915: Disable link training optimization if DP config has changed

[Mika Kahola]

These three patches are fixes for DP link trainging failures and flickering issues
reported by https://bugs.freedesktop.org/show_bug.cgi?id=91393

Mika Kahola (3):
  drm/i915: Disable fast link training if DP config changes
  drm/i915: Check DP no aux transaction bit on link training
  drm/i915: DP channel EQ check for use of DP link training optimization

 drivers/gpu/drm/i915/intel_dp.c               |  9 ++++++++-
 drivers/gpu/drm/i915/intel_dp_link_training.c | 22 ++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h              |  1 +
 3 files changed, 31 insertions(+), 1 deletion(-)

-- 
1.9.1

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[PATCH v6 1/3] drm/i915: Disable fast link training if DP config changes

[Mika Kahola]

Disable DP link training optimization if DP link configuration
changes. If one of the DP link parameters i.e. link rate or
lane count changes the link training does no longer apply the
previously computed drive current and pre-emphasis level.
Instead, the link training is started with zero values.

v6: Debug message update to use yesno() routine (Ville)

v5: Commit message update. Split the original patch in two.
    This part considers only changes on link configuration.
    Removed unnecessary debug messages. (Ville)

v4: Parameter and debug message naming improvements.
    Fix for link parameter check (Ville)

v3: Remove cached old link parameters. Instead, disable
    fast link training feature when link parameters are
    set (Ville)

v2: Readout DPCD register to check if no aux handshaking is
    required in link training (Ander)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c               | 5 +++++
 drivers/gpu/drm/i915/intel_dp_link_training.c | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 796e3d3..6b36d82 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1676,6 +1676,11 @@ found:
 void intel_dp_set_link_params(struct intel_dp *intel_dp,
 			      const struct intel_crtc_state *pipe_config)
 {
+	if (intel_dp->link_rate != pipe_config->port_clock ||
+	    intel_dp->lane_count != pipe_config->lane_count) {
+		intel_dp->train_set_valid = false;
+	}
+
 	intel_dp->link_rate = pipe_config->port_clock;
 	intel_dp->lane_count = pipe_config->lane_count;
 }
diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c
index 8888793..8f22c92 100644
--- a/drivers/gpu/drm/i915/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/intel_dp_link_training.c
@@ -85,6 +85,9 @@ static bool
 intel_dp_reset_link_train(struct intel_dp *intel_dp,
 			uint8_t dp_train_pat)
 {
+	DRM_DEBUG_KMS("link training optimization: %s\n",
+		      yesno(intel_dp->train_set_valid));
+
 	if (!intel_dp->train_set_valid)
 		memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
 	intel_dp_set_signal_levels(intel_dp);
-- 
1.9.1

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[PATCH v6 2/3] drm/i915: Check DP no aux transaction bit on link training

[Mika Kahola]

Check if *NO_AUX_TRANSACTIONS_LINK_TRAINING* bit is set on
DPCD registers. If this bit is set, we can reuse the known
good drive current and pre-emphasis level from the last
"full" link training.

v2: Commit message update (Thierry)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c               |  2 +-
 drivers/gpu/drm/i915/intel_dp_link_training.c | 19 +++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h              |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6b36d82..3137187 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3852,7 +3852,7 @@ intel_dp_link_down(struct intel_dp *intel_dp)
 	intel_dp->DP = DP;
 }
 
-static bool
+bool
 intel_dp_get_dpcd(struct intel_dp *intel_dp)
 {
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c
index 8f22c92..bcf2801 100644
--- a/drivers/gpu/drm/i915/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/intel_dp_link_training.c
@@ -85,6 +85,25 @@ static bool
 intel_dp_reset_link_train(struct intel_dp *intel_dp,
 			uint8_t dp_train_pat)
 {
+	bool has_dpcd;
+	bool no_aux_handshake = false;
+
+	has_dpcd = intel_dp_get_dpcd(intel_dp);
+
+	/*
+	 * Source device can try to use drive current and pre-emphasis
+	 * parameters computed by the last "full" link training if the
+	 * DP_NO_AUX_HANDSHAKE_LINK_TRAINING bit is set to 1.
+	 */
+	if (has_dpcd) {
+		if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) {
+			no_aux_handshake = (intel_dp->dpcd[DP_MAX_DOWNSPREAD] &
+					    DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
+		}
+	}
+
+	intel_dp->train_set_valid &= no_aux_handshake;
+
 	DRM_DEBUG_KMS("link training optimization: %s\n",
 		      yesno(intel_dp->train_set_valid));
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0438b57..918bdf1 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1250,6 +1250,7 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
 bool intel_dp_compute_config(struct intel_encoder *encoder,
 			     struct intel_crtc_state *pipe_config);
 bool intel_dp_is_edp(struct drm_device *dev, enum port port);
+bool intel_dp_get_dpcd(struct intel_dp *intel_dp);
 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port,
 				  bool long_hpd);
 void intel_edp_backlight_on(struct intel_dp *intel_dp);
-- 
1.9.1

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[PATCH v6 3/3] drm/i915: DP channel EQ check for use of DP link training optimization

[Mika Kahola]

Don't use DP link training optimization if channel EQ is not ok. It has
been reported that in case of failure in channel EQ check the link training
optimization can be enabled and therefore may not be able to reuse the
previously computed drive current and pre-emphasis levels.

v2: Added MST case (Ville)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3137187..c995dbd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4254,6 +4254,7 @@ go_again:
 			if (intel_dp->active_mst_links &&
 			    !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) {
 				DRM_DEBUG_KMS("channel EQ not ok, retraining\n");
+				intel_dp->train_set_valid = false;
 				intel_dp_start_link_train(intel_dp);
 				intel_dp_stop_link_train(intel_dp);
 			}
@@ -4354,6 +4355,7 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
 		(!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))) {
 		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
 			      intel_encoder->base.name);
+		intel_dp->train_set_valid = false;
 		intel_dp_start_link_train(intel_dp);
 		intel_dp_stop_link_train(intel_dp);
 	}
-- 
1.9.1

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Re: [PATCH v6 3/3] drm/i915: DP channel EQ check for use of DP link training optimization

[Ville Syrjälä]

On Tue, Jan 05, 2016 at 03:50:02PM +0200, Mika Kahola wrote:
> Don't use DP link training optimization if channel EQ is not ok. It has
> been reported that in case of failure in channel EQ check the link training
> optimization can be enabled and therefore may not be able to reuse the
> previously computed drive current and pre-emphasis levels.
> 
> v2: Added MST case (Ville)
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 3137187..c995dbd 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4254,6 +4254,7 @@ go_again:
>  			if (intel_dp->active_mst_links &&
>  			    !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) {
>  				DRM_DEBUG_KMS("channel EQ not ok, retraining\n");
> +				intel_dp->train_set_valid = false;
>  				intel_dp_start_link_train(intel_dp);
>  				intel_dp_stop_link_train(intel_dp);
>  			}
> @@ -4354,6 +4355,7 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
>  		(!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))) {
>  		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
>  			      intel_encoder->base.name);
> +		intel_dp->train_set_valid = false;
>  		intel_dp_start_link_train(intel_dp);
>  		intel_dp_stop_link_train(intel_dp);
>  	}
> -- 
> 1.9.1

-- 
Ville Syrjälä
Intel OTC
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✓ success: Fi.CI.BAT

[Patchwork]

== Summary ==

Built on 05ade905f2fda5416476677509e016ef830d181a drm-intel-nightly: 2016y-01m-05d-13h-00m-24s UTC integration manifest

Test gem_storedw_loop:
        Subgroup basic-render:
                dmesg-warn -> PASS       (bdw-nuci7)
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                dmesg-warn -> PASS       (bsw-nuc-2) UNSTABLE
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-a:
                dmesg-warn -> PASS       (skl-i7k-2) UNSTABLE
        Subgroup read-crc-pipe-a-frame-sequence:
                pass       -> DMESG-WARN (byt-nuc) UNSTABLE
        Subgroup read-crc-pipe-b:
                dmesg-warn -> PASS       (skl-i5k-2) UNSTABLE
                dmesg-warn -> PASS       (snb-dellxps) UNSTABLE
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (snb-x220t) UNSTABLE
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (snb-x220t) UNSTABLE
                dmesg-warn -> PASS       (skl-i7k-2)
Test pm_rpm:
        Subgroup basic-rte:
                dmesg-warn -> PASS       (byt-nuc) UNSTABLE

bdw-nuci7        total:132  pass:122  dwarn:1   dfail:0   fail:0   skip:9  
bdw-ultra        total:132  pass:124  dwarn:2   dfail:0   fail:0   skip:6  
bsw-nuc-2        total:135  pass:114  dwarn:1   dfail:0   fail:0   skip:20 
byt-nuc          total:135  pass:120  dwarn:2   dfail:0   fail:0   skip:13 
hsw-brixbox      total:135  pass:126  dwarn:2   dfail:0   fail:0   skip:7  
hsw-gt2          total:135  pass:130  dwarn:1   dfail:0   fail:0   skip:4  
hsw-xps12        total:132  pass:125  dwarn:3   dfail:0   fail:0   skip:4  
ilk-hp8440p      total:135  pass:100  dwarn:0   dfail:0   fail:0   skip:35 
ivb-t430s        total:135  pass:127  dwarn:2   dfail:0   fail:0   skip:6  
skl-i5k-2        total:135  pass:125  dwarn:2   dfail:0   fail:0   skip:8  
skl-i7k-2        total:135  pass:125  dwarn:2   dfail:0   fail:0   skip:8  
snb-dellxps      total:135  pass:122  dwarn:1   dfail:0   fail:0   skip:12 
snb-x220t        total:135  pass:121  dwarn:2   dfail:0   fail:1   skip:11 

Results at /archive/results/CI_IGT_test/Patchwork_1084/

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Re: [PATCH v6 0/3] drm/i915: Disable link training optimization if DP config has changed

[Timo Aaltonen]

05.01.2016, 15:49, Mika Kahola kirjoitti:
> These three patches are fixes for DP link trainging failures and flickering issues
> reported by https://bugs.freedesktop.org/show_bug.cgi?id=91393
> 
> Mika Kahola (3):
>   drm/i915: Disable fast link training if DP config changes
>   drm/i915: Check DP no aux transaction bit on link training
>   drm/i915: DP channel EQ check for use of DP link training optimization
> 
>  drivers/gpu/drm/i915/intel_dp.c               |  9 ++++++++-
>  drivers/gpu/drm/i915/intel_dp_link_training.c | 22 ++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h              |  1 +
>  3 files changed, 31 insertions(+), 1 deletion(-)

The fourth patch from the bug is missing, have you sent it to the list?


-- 
t
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