All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-ia64@vger.kernel.org, linux-metag@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
	linux-sh@vger.kernel.org, linux-arch@vger.kernel.org,
	Will.Deacon@arm.com, catalin.marinas@arm.com,
	grant.likely@linaro.org, leif.lindholm@linaro.org,
	rfranz@cavium.com, ard.biesheuvel@linaro.org, msalter@redhat.com,
	steve.capper@linaro.org, hanjun.guo@linaro.org,
	al.stone@linaro.org, arnd@arndb.de, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rjw@rjwysocki.net, lenb@kernel.org,
	marc.zyngier@arm.com, lorenzo.pieralisi@arm.com,
	bhelgaas@google.com, tony.luck@intel.com, fenghua.yu@intel.com,
	james.hogan@imgtec.com, benh@kernel.crashing.org,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor
Subject: Re: [PATCH v9 2/6] Documentation, dt, arm64/arm: dt bindings for numa.
Date: Wed, 20 Jan 2016 08:18:06 -0600	[thread overview]
Message-ID: <20160120141806.GA8434@rob-hp-laptop> (raw)
In-Reply-To: <1453134965-6125-3-git-send-email-gkulkarni@caviumnetworks.com>

On Mon, Jan 18, 2016 at 10:06:01PM +0530, Ganapatrao Kulkarni wrote:
> DT bindings for numa mapping of memory, cores and IOs.
> 
> Reviewed-by: Robert Richter <rrichter@cavium.com>
> Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
> ---
>  Documentation/devicetree/bindings/arm/numa.txt | 272 +++++++++++++++++++++++++
>  1 file changed, 272 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/numa.txt

This is looks okay to me, but some cosmetic things on the example.

> +==============================================================================
> +4 - Example dts
> +==============================================================================
> +
> +2 sockets system consists of 2 boards connected through ccn bus and
> +each board having one socket/soc of 8 cpus, memory and pci bus.
> +
> +	memory@00c00000 {

Drop the leading 0s on unit addresses.

> +		device_type = "memory";
> +		reg = <0x0 0x00c00000 0x0 0x80000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +	};
> +
> +	memory@10000000000 {
> +		device_type = "memory";
> +		reg = <0x100 0x00000000 0x0 0x80000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu@000 {

Same here (leaving one of course).

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x000>;
> +			enable-method = "psci";
> +			/* node 0 */
> +			numa-node-id = <0>;
> +		};
> +		cpu@001 {

and so on...

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x001>;

Either all leading 0s or none.

> +			reg = <0x0 0x008>;
> +			enable-method = "psci";
> +			/* node 1 */

Kind of a pointless comment.

Wouldn't each cluster of cpus for a given numa node be in a different 
cpu affinity? Certainly not required by the architecture, but the common 
case at least.

> +			numa-node-id = <1>;
> +		};

[...]

> +	pcie0: pcie0@0x8480,00000000 {

Drop the 0x and the comma.

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x8480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +        };
> +
> +	pcie1: pcie1@0x9480,00000000 {

ditto

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x9480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +        };
> +
> +	distance-map {
> +		compatible = "numa-distance-map-v1";
> +		distance-matrix = <0 0 10>,
> +				  <0 1 20>,
> +				  <1 1 10>;
> +	};
> -- 
> 1.8.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-ia64@vger.kernel.org, linux-metag@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
	linux-sh@vger.kernel.org, linux-arch@vger.kernel.org,
	Will.Deacon@arm.com, catalin.marinas@arm.com,
	grant.likely@linaro.org, leif.lindholm@linaro.org,
	rfranz@cavium.com, ard.biesheuvel@linaro.org, msalter@redhat.com,
	steve.capper@linaro.org, hanjun.guo@linaro.org,
	al.stone@linaro.org, arnd@arndb.de, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rjw@rjwysocki.net, lenb@kernel.org,
	marc.zyngier@arm.com, lorenzo.pieralisi@arm.com,
	bhelgaas@google.com, tony.luck@intel.com, fenghua.yu@intel.com,
	james.hogan@imgtec.com, benh@kernel.crashing.org,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	x86@kernel.org, jonathan@jonmasters.org, rrichter@cavium.com,
	Prasun.Kapoor@caviumnetworks.com, gpkulkarni@gmail.com
Subject: Re: [PATCH v9 2/6] Documentation, dt, arm64/arm: dt bindings for numa.
Date: Wed, 20 Jan 2016 08:18:06 -0600	[thread overview]
Message-ID: <20160120141806.GA8434@rob-hp-laptop> (raw)
Message-ID: <20160120141806.45ygqPI_mXVZgV8D_Sp-kxo0rcjKKvAI9yHzgNDXo-M@z> (raw)
In-Reply-To: <1453134965-6125-3-git-send-email-gkulkarni@caviumnetworks.com>

On Mon, Jan 18, 2016 at 10:06:01PM +0530, Ganapatrao Kulkarni wrote:
> DT bindings for numa mapping of memory, cores and IOs.
> 
> Reviewed-by: Robert Richter <rrichter@cavium.com>
> Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
> ---
>  Documentation/devicetree/bindings/arm/numa.txt | 272 +++++++++++++++++++++++++
>  1 file changed, 272 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/numa.txt

This is looks okay to me, but some cosmetic things on the example.

> +==============================================================================
> +4 - Example dts
> +==============================================================================
> +
> +2 sockets system consists of 2 boards connected through ccn bus and
> +each board having one socket/soc of 8 cpus, memory and pci bus.
> +
> +	memory@00c00000 {

Drop the leading 0s on unit addresses.

> +		device_type = "memory";
> +		reg = <0x0 0x00c00000 0x0 0x80000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +	};
> +
> +	memory@10000000000 {
> +		device_type = "memory";
> +		reg = <0x100 0x00000000 0x0 0x80000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu@000 {

Same here (leaving one of course).

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x000>;
> +			enable-method = "psci";
> +			/* node 0 */
> +			numa-node-id = <0>;
> +		};
> +		cpu@001 {

and so on...

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x001>;

Either all leading 0s or none.

> +			reg = <0x0 0x008>;
> +			enable-method = "psci";
> +			/* node 1 */

Kind of a pointless comment.

Wouldn't each cluster of cpus for a given numa node be in a different 
cpu affinity? Certainly not required by the architecture, but the common 
case at least.

> +			numa-node-id = <1>;
> +		};

[...]

> +	pcie0: pcie0@0x8480,00000000 {

Drop the 0x and the comma.

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x8480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +        };
> +
> +	pcie1: pcie1@0x9480,00000000 {

ditto

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x9480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +        };
> +
> +	distance-map {
> +		compatible = "numa-distance-map-v1";
> +		distance-matrix = <0 0 10>,
> +				  <0 1 20>,
> +				  <1 1 10>;
> +	};
> -- 
> 1.8.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-ia64@vger.kernel.org, linux-metag@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
	linux-sh@vger.kernel.org, linux-arch@vger.kernel.org,
	Will.Deacon@arm.com, catalin.marinas@arm.com,
	grant.likely@linaro.org, leif.lindholm@linaro.org,
	rfranz@cavium.com, ard.biesheuvel@linaro.org, msalter@redhat.com,
	steve.capper@linaro.org, hanjun.guo@linaro.org,
	al.stone@linaro.org, arnd@arndb.de, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rjw@rjwysocki.net, lenb@kernel.org,
	marc.zyngier@arm.com, lorenzo.pieralisi@arm.com,
	bhelgaas@google.com, tony.luck@intel.com, fenghua.yu@intel.com,
	james.hogan@imgtec.com, benh@kernel.crashing.org,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor
Subject: Re: [PATCH v9 2/6] Documentation, dt, arm64/arm: dt bindings for numa.
Date: Wed, 20 Jan 2016 14:18:06 +0000	[thread overview]
Message-ID: <20160120141806.GA8434@rob-hp-laptop> (raw)
In-Reply-To: <1453134965-6125-3-git-send-email-gkulkarni@caviumnetworks.com>

On Mon, Jan 18, 2016 at 10:06:01PM +0530, Ganapatrao Kulkarni wrote:
> DT bindings for numa mapping of memory, cores and IOs.
> 
> Reviewed-by: Robert Richter <rrichter@cavium.com>
> Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
> ---
>  Documentation/devicetree/bindings/arm/numa.txt | 272 +++++++++++++++++++++++++
>  1 file changed, 272 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/numa.txt

This is looks okay to me, but some cosmetic things on the example.

> +=======================================
> +4 - Example dts
> +=======================================
> +
> +2 sockets system consists of 2 boards connected through ccn bus and
> +each board having one socket/soc of 8 cpus, memory and pci bus.
> +
> +	memory@00c00000 {

Drop the leading 0s on unit addresses.

> +		device_type = "memory";
> +		reg = <0x0 0x00c00000 0x0 0x80000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +	};
> +
> +	memory@10000000000 {
> +		device_type = "memory";
> +		reg = <0x100 0x00000000 0x0 0x80000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu@000 {

Same here (leaving one of course).

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x000>;
> +			enable-method = "psci";
> +			/* node 0 */
> +			numa-node-id = <0>;
> +		};
> +		cpu@001 {

and so on...

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x001>;

Either all leading 0s or none.

> +			reg = <0x0 0x008>;
> +			enable-method = "psci";
> +			/* node 1 */

Kind of a pointless comment.

Wouldn't each cluster of cpus for a given numa node be in a different 
cpu affinity? Certainly not required by the architecture, but the common 
case at least.

> +			numa-node-id = <1>;
> +		};

[...]

> +	pcie0: pcie0@0x8480,00000000 {

Drop the 0x and the comma.

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x8480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +        };
> +
> +	pcie1: pcie1@0x9480,00000000 {

ditto

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x9480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +        };
> +
> +	distance-map {
> +		compatible = "numa-distance-map-v1";
> +		distance-matrix = <0 0 10>,
> +				  <0 1 20>,
> +				  <1 1 10>;
> +	};
> -- 
> 1.8.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 2/6] Documentation, dt, arm64/arm: dt bindings for numa.
Date: Wed, 20 Jan 2016 08:18:06 -0600	[thread overview]
Message-ID: <20160120141806.GA8434@rob-hp-laptop> (raw)
In-Reply-To: <1453134965-6125-3-git-send-email-gkulkarni@caviumnetworks.com>

On Mon, Jan 18, 2016 at 10:06:01PM +0530, Ganapatrao Kulkarni wrote:
> DT bindings for numa mapping of memory, cores and IOs.
> 
> Reviewed-by: Robert Richter <rrichter@cavium.com>
> Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
> ---
>  Documentation/devicetree/bindings/arm/numa.txt | 272 +++++++++++++++++++++++++
>  1 file changed, 272 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/numa.txt

This is looks okay to me, but some cosmetic things on the example.

> +==============================================================================
> +4 - Example dts
> +==============================================================================
> +
> +2 sockets system consists of 2 boards connected through ccn bus and
> +each board having one socket/soc of 8 cpus, memory and pci bus.
> +
> +	memory at 00c00000 {

Drop the leading 0s on unit addresses.

> +		device_type = "memory";
> +		reg = <0x0 0x00c00000 0x0 0x80000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +	};
> +
> +	memory at 10000000000 {
> +		device_type = "memory";
> +		reg = <0x100 0x00000000 0x0 0x80000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu at 000 {

Same here (leaving one of course).

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x000>;
> +			enable-method = "psci";
> +			/* node 0 */
> +			numa-node-id = <0>;
> +		};
> +		cpu at 001 {

and so on...

> +			device_type = "cpu";
> +			compatible =  "arm,armv8";
> +			reg = <0x0 0x001>;

Either all leading 0s or none.

> +			reg = <0x0 0x008>;
> +			enable-method = "psci";
> +			/* node 1 */

Kind of a pointless comment.

Wouldn't each cluster of cpus for a given numa node be in a different 
cpu affinity? Certainly not required by the architecture, but the common 
case at least.

> +			numa-node-id = <1>;
> +		};

[...]

> +	pcie0: pcie0 at 0x8480,00000000 {

Drop the 0x and the comma.

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x8480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>;
> +		/* node 0 */
> +		numa-node-id = <0>;
> +        };
> +
> +	pcie1: pcie1 at 0x9480,00000000 {

ditto

> +		compatible = "arm,armv8";
> +		device_type = "pci";
> +		bus-range = <0 255>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		reg = <0x9480 0x00000000 0 0x10000000>;  /* Configuration space */
> +		ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>;
> +		/* node 1 */
> +		numa-node-id = <1>;
> +        };
> +
> +	distance-map {
> +		compatible = "numa-distance-map-v1";
> +		distance-matrix = <0 0 10>,
> +				  <0 1 20>,
> +				  <1 1 10>;
> +	};
> -- 
> 1.8.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

  reply	other threads:[~2016-01-20 14:18 UTC|newest]

Thread overview: 98+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-18 16:35 [PATCH v9 0/6] arm64, numa: Add numa support for arm64 platforms Ganapatrao Kulkarni
2016-01-18 16:47 ` Ganapatrao Kulkarni
2016-01-18 16:35 ` Ganapatrao Kulkarni
2016-01-18 16:35 ` Ganapatrao Kulkarni
2016-01-18 16:35 ` Ganapatrao Kulkarni
2016-01-18 16:36 ` [PATCH v9 1/6] arm64, numa: adding " Ganapatrao Kulkarni
2016-01-18 16:48   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-26 18:52   ` Bjorn Helgaas
2016-01-26 18:52     ` Bjorn Helgaas
2016-01-26 18:52     ` Bjorn Helgaas
2016-01-26 18:52     ` Bjorn Helgaas
     [not found] ` <1453134965-6125-1-git-send-email-gkulkarni-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-01-18 16:36   ` [PATCH v9 2/6] Documentation, dt, arm64/arm: dt bindings for numa Ganapatrao Kulkarni
2016-01-18 16:48     ` Ganapatrao Kulkarni
2016-01-18 16:36     ` Ganapatrao Kulkarni
2016-01-18 16:36     ` Ganapatrao Kulkarni
2016-01-18 16:36     ` Ganapatrao Kulkarni
2016-01-20 14:18     ` Rob Herring [this message]
2016-01-20 14:18       ` Rob Herring
2016-01-20 14:18       ` Rob Herring
2016-01-20 14:18       ` Rob Herring
2016-01-26 17:16       ` Ganapatrao Kulkarni
2016-01-26 17:28         ` Ganapatrao Kulkarni
2016-01-26 17:16         ` Ganapatrao Kulkarni
2016-01-26 17:16         ` Ganapatrao Kulkarni
2016-01-18 16:36 ` [PATCH v9 3/6] arm64/arm, numa, dt: adding numa dt binding implementation for arm64 platforms Ganapatrao Kulkarni
2016-01-18 16:48   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
     [not found]   ` <1453134965-6125-4-git-send-email-gkulkarni-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-01-26 20:36     ` Bjorn Helgaas
2016-01-26 20:36       ` Bjorn Helgaas
2016-01-26 20:36       ` Bjorn Helgaas
2016-01-26 20:36       ` Bjorn Helgaas
2016-01-28 14:39       ` Will Deacon
2016-01-28 14:39         ` Will Deacon
2016-01-28 14:39         ` Will Deacon
     [not found]         ` <20160128143925.GC775-5wv7dgnIgG8@public.gmane.org>
2016-01-28 17:12           ` Ganapatrao Kulkarni
2016-01-28 17:24             ` Ganapatrao Kulkarni
2016-01-28 17:24             ` Ganapatrao Kulkarni
2016-01-28 17:12             ` Ganapatrao Kulkarni
2016-01-28 17:12             ` Ganapatrao Kulkarni
2016-01-28 17:12             ` Ganapatrao Kulkarni
2016-01-28 18:08             ` Will Deacon
2016-01-28 18:08               ` Will Deacon
2016-01-28 18:08               ` Will Deacon
2016-01-28 18:08               ` Will Deacon
2016-01-28 18:48               ` Ganapatrao Kulkarni
2016-01-28 18:48                 ` Ganapatrao Kulkarni
2016-01-28 18:48                 ` Ganapatrao Kulkarni
2016-01-28 18:48                 ` Ganapatrao Kulkarni
2016-01-28 18:48                 ` Ganapatrao Kulkarni
2016-01-18 16:36 ` [PATCH v9 4/6] arm64, dt, thunderx: Add initial dts for Cavium Thunderx in 2 node topology Ganapatrao Kulkarni
2016-01-18 16:48   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 17:49   ` David Daney
2016-01-18 17:49     ` David Daney
2016-01-18 17:49     ` David Daney
2016-01-18 17:49     ` David Daney
2016-01-18 16:36 ` [PATCH v9 5/6] PCI: generic: Make pci-host-generic driver numa aware Ganapatrao Kulkarni
2016-01-18 16:48   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 17:41   ` David Daney
2016-01-18 17:41     ` David Daney
2016-01-18 17:41     ` David Daney
2016-01-18 17:41     ` David Daney
2016-01-19  5:58     ` Ganapatrao Kulkarni
2016-01-19  6:10       ` Ganapatrao Kulkarni
2016-01-19  5:59       ` Ganapatrao Kulkarni
2016-01-19  5:58       ` Ganapatrao Kulkarni
2016-01-19  5:58       ` Ganapatrao Kulkarni
     [not found]       ` <CAFpQJXXESn1EA5kotVOH2oLbRUSpOLf6+MeWG1pY_GhUP+4vVQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-01-19  9:41         ` Lorenzo Pieralisi
2016-01-19  9:41           ` Lorenzo Pieralisi
2016-01-19  9:41           ` Lorenzo Pieralisi
2016-01-19  9:41           ` Lorenzo Pieralisi
2016-01-19 12:32           ` Ganapatrao Kulkarni
2016-01-19 12:44             ` Ganapatrao Kulkarni
2016-01-19 12:32             ` Ganapatrao Kulkarni
2016-01-19 12:32             ` Ganapatrao Kulkarni
     [not found]   ` <1453134965-6125-6-git-send-email-gkulkarni-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-01-26 20:50     ` Bjorn Helgaas
2016-01-26 20:50       ` Bjorn Helgaas
2016-01-26 20:50       ` Bjorn Helgaas
2016-01-26 20:50       ` Bjorn Helgaas
2016-01-26 20:52       ` Bjorn Helgaas
2016-01-26 20:52         ` Bjorn Helgaas
2016-01-26 20:52         ` Bjorn Helgaas
2016-01-26 20:52         ` Bjorn Helgaas
2016-01-18 16:36 ` [RFC PATCH v9 6/6] topology, cleanup: Avoid redefinition of cpumask_of_pcibus in asm header files Ganapatrao Kulkarni
2016-01-18 16:48   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni
2016-01-18 16:36   ` Ganapatrao Kulkarni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160120141806.GA8434@rob-hp-laptop \
    --to=robh@kernel.org \
    --cc=Will.Deacon@arm.com \
    --cc=al.stone@linaro.org \
    --cc=ard.biesheuvel@linaro.org \
    --cc=arnd@arndb.de \
    --cc=benh@kernel.crashing.org \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=fenghua.yu@intel.com \
    --cc=galak@codeaurora.org \
    --cc=gkulkarni@caviumnetworks.com \
    --cc=grant.likely@linaro.org \
    --cc=hanjun.guo@linaro.org \
    --cc=hpa@zytor \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=james.hogan@imgtec.com \
    --cc=leif.lindholm@linaro.org \
    --cc=lenb@kernel.org \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-ia64@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-metag@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-s390@vger.kernel.org \
    --cc=linux-sh@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=msalter@redhat.com \
    --cc=pawel.moll@arm.com \
    --cc=rfranz@cavium.com \
    --cc=rjw@rjwysocki.net \
    --cc=steve.capper@linaro.org \
    --cc=tglx@linutronix.de \
    --cc=tony.luck@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.